Today Debug stm32f103 ADC, using the ADC1 single conversion mode for two-channel ad sampling, found that there are two channels of annoyance. The relevant ad operation code is as follows:
voidadc_start_convert (uint8_t ch) {ADC1->SMPR2 = (ADC1->SMPR2 &0xfffffff8) |7; ADC1->SQR3 = (ADC1->SQR3 &0xffffffe0) |ch; Adc_softwarestartconvcmd (ADC1, ENABLE);} uint8_t Adc_is_convert_finish (void){ if((adc1->sr&0x02) ==0) return 0; Else return 1;} uint16_t Adc_get_value (void){ returnADC1DR;}
After many times of debugging, the final solution is as follows:
1. Modify the ADC clock frequency
Rcc_adcclkconfig (RCC_PCLK2_DIV8);
2. Modify the ADC start conversion function
void adc_start_convert (uint8_t ch) { 1, adc_sampletime_13cycles5); // adc1->smpr2 = (adc1->smpr2 & 0XFFFFFFF8) | 7; // ADC1->SQR3 = (ADC1->SQR3 & 0xffffffe0) | ch; adc_softwarestartconvcmd (ADC1, ENABLE);}
For the Solution Step (2), the method of using the STM32 official library and the way of the direct operation register should be consistent in theory, but the measured results show that there is still interference in the way of using the direct operation register. The problem failed to find the cause.
AD channel interference problem in STM32