At present, the AMBA2.0 AHB Bus specification and AMBA3.0 Axi Bus specifications designed by ARM are being widely used in various SOC chip designs. Their standards for interfacing and interconnection contribute to modular design to accommodate the need for ultra-large scale soc design.
The Axi bus is very distinct compared to the AHB bus:
- Divided into 5 independent channels, unidirectional transmission, helps to increase clock frequency and reduce delay
- Support for disorderly ordering
- Valid and ready handshake mode, more simple
- Burst mode, only provide the initial address, control more convenient
- Symmetric master-Slave interface for more flexible system interconnection
- Low Power mode support
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Reference: AMBA? AXI Protocol Spec
AMBA Axi Bus