An understanding of the MMU segment-type conversion

This article will introduce the process of the MMU section conversion in detail, and attach a more detailed article about the MMU at the end of the paper. Specifically what is the MMU, what time period is the conversion is not in this article, directly poke at the end of the link.

First, the conditions for the segment conversion. We want to have a virtual address, and a page table, which is usually built by the engineer in the code. Each virtual address has a corresponding table entry in this one-level page table. We only need to know the base address of the primary page table, and then offset the high 12 bits of the virtual address to find the table entry for that virtual address. As you can see from here, the first 12 bits of the same virtual address are in fact the same table entry in the first-level page table. For example: 0X56000000~0X560FFFFF This 1MB space is the same table entry used.

Secondly, we have found this table item, what kind of egg does he have? Let's look at the format of the table entry, such as:

High 12 bits is the base address of the segment, the meaning of the other bits refer to the 3.3.4 summary of "arm920t_trm1_s", the focus of this article is not here, so don't repeat it. The most important thing is the base address of the segment, and with it, we can get the physical address that our peripherals need by splicing it with the low 20 bits of the virtual address. As can be seen here, a segment of the size of 2^20 is 1MB so big.

In short, the whole process is: by the high 12 bits of the virtual address to find the corresponding table in the table, the high 12 bits of the table entry and the virtual address of the lower 20 bits of the mosaic, the physical address, so that the conversion from the virtual address to the physical address has been completed.

The following is the misunderstanding I understand these things, I hope you do not make it happen again:

1, has been mistaken that the table is stored in the key is the physical address, in fact, is not the case, the physical address is high 12 bits of the table entry and the virtual address of the low 20-bit stitching obtained. The low 20 bits of a table entry are also useful, such as deciding on some permission bits, and whether or not to use Cache,write_buffer.

2, the base address of the primary page table and the site of the segment is not the same thing, the page table is only stored table entries, the table entries record the base address of some segments. For example, we control the LEDs need to use 0x56000010 and 0x56000014 the two address of the register, they belong to the same segment, the base address of the segment is 0x56000000, and we may store the page table in another place, such as 0x30000000, So the two addresses are irrelevant.

Reference code:

　　

//1, set up a page table, here put it in the memory of the starting address, that is, the base site of the page table//2. Offset the high 12 bits of the virtual address to find the table entry corresponding to the virtual address//3, the contents of the table items: High 12 bits of the base address of the high 12-bit, low 20-bit for the following defined macro//4, Physical Address: The base address of the segment and the virtual address of the low 20-bit splicing to come#defineGpbcon * (volatile unsigned long*) 0xa0000010)#defineGpbdat * (volatile unsigned long*) 0xa0000014)#defineMmu_section (2 << 0)#defineMmu_cache (1 << 3)#defineMmu_buffer (1 << 2)#defineMmu_special (1 << 4)#defineMmu_full_access (3 << 10)#defineMmu_domain (0 << 5)#defineSecdesc Mmu_section | mmu_special | Mmu_domain | Mmu_full_access#defineSECDESC_WB Mmu_section | mmu_special | Mmu_domain | mmu_full_access | Mmu_buffer | Mmu_cachevoidcreate_page_table () {//Place the first-level page table in the memory start addressUnsignedLong*TTB = (unsignedLong*)0x30000000; unsignedLongvaddr, paddr; //Virtual AddressVADDR =0xa0000000; //Physical AddressPADDR =0x56000000; //address of table entry = Primary page table base address + virtual 12-bit high (as index)* (TTB + (vaddr >> -)) = (0x56000000&0xfff00000) | Secdesc;//contents of the table itemvaddr=0x30000000; Paddr=0x30000000;  while(Vaddr <0x34000000)    {        * (TTB + (vaddr >> -)) = (Paddr &0xfff00000) |SECDESC_WB; Vaddr+=0x100000;//0x100000 = 16^5 = 2^20 = 1MBPaddr + =0x100000; }}voidMmu_init () {__asm__ ("Ldr R0, =0x30000000\n"        "MCR P15, 0, R0, C2, C0, 0\n"        "mvn r0, #0 \ n"        "MRC P15, 0, R0, C3, C0, 0\n"        "MRC P15, 0, R0, C1, C0, 0\n"        "Orr R0, r0, #0x0001 \ n"        "MCR P15, 0, R0, C1, C0, 0\n"        :        :    );}//using the virtual address Gpbcon, gpbdat-lit LEDsintGboot_main () {//1, the establishment of a Level page tablecreate_page_table (); //2, Write TTB, open MMUMmu_init (); Gpbcon=0x15400; Gpbdat=0b11010111111; return 0;}

Attach a more detailed article about the MMU (EXT): http://www.cnblogs.com/wrjvszq/p/4246634.html

If there are any errors or problems, please indicate that the reprint should indicate the source.

18:09:45

2015-07-26

　　

An understanding of the MMU segment-type conversion