Analysis of S3C2440 storage controller and MMU

Analysis of S3C2440 storage controller and MMU

K-style

Reprinted please indicate from Hengyang Normal College 08 electric 2 k-style http://blog.csdn.net/ayangke,QQ:843308498 mailbox: yangkeemail@qq.com

1. S3C2440 storage controller

If you have written an arm bare metal program of S3C2440, you should know that the starting address of the SDRAM is usually 0x30000000, but have you ever wondered why? I will give you a brief introduction below.

According to the S3C2440 manual, we can see that S3C2440 can address a 1g address range, but there are only 27 address lines in the S3C2440 address range. Theoretically, only 27 power of 2 can address a M address range. Therefore, S3C2440 solved this problem through a Dongdong called bank. S3C2440 leads to eight bank lines (corresponding to ngcs0 ~ Ngcs7), select and disable different memory through the eight lines, so that the S3C2440 can connect up to eight MB of memory, as long as you select only one bank at a certain time, you can achieve 1 GB of addressing space. Each bank has an address. The access to the Bank address is actually the access to the bank, therefore, the ARM core only needs to issue an address, and the storage controller of the S3C2440 just needs to interpret the address into two parts: one is the Bank address, and the other is the address connected to the internal address of the bank memory.

As a 32-bit CPU, the address range can theoretically reach the power of 2 to 4 GB. Apart from the above 1 GB address space, there is also a part of the address of the internal CPU register, the remaining address space is not used.

Next we can see the address space distribution chart of the S3C2440 memory.

On the left is the address space map for CPU startup from nor flash, and on the right is the address space map for CPU startup from NAND Flash. We can see that the SDRAM is connected to bank6 and the address is 0x30000000, which explains the problem at the beginning. Why is the address space different when the CPU is started from NAND and nor? This is because the nor is a linear structure, which is similar to the ordinary memory and connected to bank0. The NAND is another structure. The S3C2440 has a dedicated NAND controller connected to the address line and cannot be connected to bank0. When the CPU starts, the program must start from the 0 address, and when the NAND starts, the 0 address has no memory. What should the CPU do? So there is a kind
Stone), it is a 4 K memory inside the S3C2440, when starting from the NAND, the 0-address line will be connected to the starting stone, at the same time, the CPU will use internal hardware to copy 4 k Data starting with NAND flash to the start stone. The program in the starting stone is generally designed to initialize the SDRAM, copy some programs in the nand to the sdarm, and then jump to the SDRAM to start executing the program. So as U-BOOT transplantation to support the start from the NAND, the first 4 K program of the NAND needs to be processed.

Next, let's take a look at the access addresses of General peripherals connected to the storage controller and the access addresses of some registers.

Ii. S3C2440MMU

1. Role of MMU

The first part of the discussion is all about physical addresses. Be sure not to confuse these virtual addresses with the virtual addresses.

Memory Management Unit (MMU. It converts a virtual address to a physical address and sends it to the storage manager described in the previous section for addressing.

In modern multi-user multi-process operating systems, MMU enables each user process to have its own independent address space: the address ing function enables a process to have an identical address space, the check of memory access permissions can protect the memory used by each process from being damaged by other processes.

Let me give a lame example. A (process a) went to a librarians to borrow a book named "Memory" and said that he would use it at seven o'clock. The librarians gave a sign to students a, indicating which floor of the building and which room had the book. However, this sign can only be used at seven o'clock and can only be used for three hours (permissions ), b's intention to borrow this book is only 12 o'clock, and the Library also gives B A brand. In different cases, this brand can only be borrowed for three hours at 12 o'clock. As a result, both A and B borrowed this book, and they all felt that they had this book and they would not be disturbed by other students when they had it. In fact, here the student represents the process. The librarian represents the kernel, the brand represents the virtual address, and the book represents the actual memory, MMU's job is to get the student's sign to help the student find the book.

The virtual address must be converted to a physical address to read and write the actual data. By dividing the virtual address space and the physical address space into a small shard of the same size, then, a ing space is created for two types of small spaces. It is possible that multiple virtual addresses are mapped to the same physical address space, or some virtual address spaces are mapped to specific physical address spaces. After MMU is started, the CPU sends out a virtual address, and MMU converts the virtual address into a physical address for access.

2. Conversion from a virtual address space to a physical space

Use the page table conversion method in the arm cpu. The Linux kernel generally uses two-level page tables. What is a page table? It is like a directory in our book. It has a main directory and a secondary directory. When we want to find a knowledge point, first find the main directory, then find the next directory and then find the corresponding knowledge point. Each process creates a directory in the memory and stores the directory address. When you need to access the directory, it will put the Directory into a dedicated register of the CPU, and then the MMU will read the value in this register to help us find the physical address we want to access.

How is a page table created?

In fact, it puts the memory address of the first level directory in the memory address, and then stores the actual physical address in the memory of the first level directory.

 

Here I only give a rough introduction to MMU. To learn more, I will go to Chapter 7th of "embedded Linux application development full manual" of Wei Dongshan.