Android LCD (II): principle of common LCD Interfaces

Source: Internet
Author: User


Platform information:
Kernel: linux2.6/linux3.0
System: Android/android4.0
Platform: Samsung exynos 4210, exynos 4412, and exynos 5250

Author: xubin341719 (You are welcome to reprint it. Please note the author)

Correct the mistakes and learn and make progress together !!

Download link: LCD specifications (404 copies), LCD specifications used for previous work 00
LCD specifications 01,
LCD Testing images, color bars, gray scale, etc.

Android LCD (I): Basic LCD principles

Android LCD (II): principle of common LCD Interfaces

Android LCD (III): Samsung LCD interface

Android LCD (iv): LCD Driver debugging

Common TFT-LCD interfaces, such as TTL (RGB), LVDS, EDP, and mipi. In this article, we will give a general idea about the signal composition of these interfaces.


1. TTL interface Overview

TTL (transistor Transistor Logic) is the transistor-transistor logic. The TTL level signal is generated by the TTL device. TTL devices are a major category of Digital Integrated Circuits. They are manufactured using dual-Pole Technology and have high speed, low power consumption, and many varieties.

The TTL interface is an interface for data transmission in parallel. When using this interface, you do not need to use a dedicated interface circuit on the driver and LCD Panel of the LCD display, instead, the TTL data signal output by the driver board's master chip is directly transmitted to the receiver interface of the LCD Panel through a cable. Due to the high signal voltage, many connections, and long transmission cables of the TTL interface, the circuit has poor anti-interference capability and is prone to electromagnetic interference (EMI ). In practical applications, the TTL interface circuit is used to drive small-sized (less than 15 in) or low-resolution LCD panels. The maximum TTL pixel clock is only 28 MHz.

TTL is the only signal that can be recognized by the TFT-LCD when the signal, early digital processing chip is TTL, that is, RGB directly output to TFT-LCD.

2. Signal type of the TTL Interface

The driver board TTL output interface generally contains RGBData signal, clock signal and control signalThese three types of signals. As shown in:

(1) RGB data signal

A. Single Channel TTL

Single-Channel 6-bit TTL output interface

For a 6-bit single-path TTL output interface, there are 18 RGB data lines, respectively R0 ~ Six R5 red-color data entries, G0 ~ 6 G5 green color data records, B0 ~ There are 6 B5 blue-color data records, 3*6 = 18 in total. Because the base color RGB data is 18 bits, it is also called 18 bits or18bitttl Interface.

Single-Channel 8-bit TTL output interface

For 8-bit single-channel TTI, the output interface has 24 RGB data lines, respectively R0 ~ 8 red-colored data records in R7, B0 ~ B7 green color data 8, Bo ~ B7 8 blue-color data records, 3x8 = 24 in total. Because the base color RGB data is 24bit, it is also called 24-bit or24bitttl Interface.

B. dual-channel TTL

Dual-channel, that is, two groups of RGB data,It can be divided into odd channels and even channels, and the clock can also be divided into oclk/eclk,Some share one,We drew two pictures as follows:

Dual-channel 6-bit TTL output interface

For 6-bit dual-path TTL, a total of 36 RGB data lines are output interfaces, which are 18 qidu RGB data lines, 18 dual RGB data lines, and 3x6x2 = 36. Because the base color Rob data is 36 bits, it is also called 36 bits or36bitttl Interface.

Two-channel 8-bit TTL output interface

For 8-bit dual-path TTL output interfaces, there are a total of 48 RGB data lines, including 24 qidu RGB data lines, 24 dual RGB data lines, and 3x8x2 = 48. Because the base color RGB data is 48bit, it is also called 48-bit or48bitttl Interface.

(2) clock signal

It refers to the pixel clock signal, which is the benchmark for transmitting data and reading data signals. Different output interfaces use pixel clock to transmit RGB data in the odd/idol dual-path mode. Some output interfaces share one pixel clock signal, while some output interfaces use odd/even two channels to set two clock signals: Odd pixel data clock and even pixel clock, to meet the needs of different LCD panels.

(3) control signal

The control signals include the data enable signal (or the effective display data selected communication number) de, the line synchronous signal HS, and the field synchronous signal.


1. LVDS interface Overview

LVDS (low voltage differential signaling) is a low-voltage differential signal technique interface. A digital video signal transmission method developed to overcome the disadvantages of high power consumption and high EMI electromagnetic interference when using TTL-level data transmission. The LVDS output interface uses a very low voltage swing (about 350mV) to transmit data in two PCB cables or one pair of balanced cables by differential transmission, that is, low-voltage differential signal transmission. The LVDS output interface enables signal transmission at several hundred Mbit/s rates on differential PCB cables or balanced cables. Due to the low-voltage and low-current driving modes, low Noise and low power consumption are achieved.

2. LVDS interface circuit composition
The LVDS interface circuit consists of two parts: the LVDS output interface circuit on the motherboard side (LVDS Transmitter side) and the LVDS input interface circuit (LVDS receiver) on the LCD panel side ). The LVDS sending end converts the TTL signal to the LVDS signal, and then transmits the signal to the LVDS decoding IC at the LVDS receiving end on the LCD Panel through a flexible cable (Cable) between the Driver Board and the LCD panel, the LVDS receiver then converts the serial signal to a parallel signal of TTL level and sends it to the LCD Timing Control and row-column driving circuit. That is, TFT only recognizes TTL (RGB) signals. This part of our Samsung program is used more, because the Samsung chip does not LVDS output, so we use LVDS interface TFT-LCD to add a (RGB-LVDS) conversion chip, we will focus on this later.

3. LVDS interface signal type

LVDS signals are composed of data difference and clock difference signal. As shown in:

(1) Single Channel LVDS

6-bit data in a single channel (if it is a 6-bit y3m/P, this red line does not exist)

YesFour groupsDifferential line, three signal lines, a set of clock lines. Y0m, y0p, y1m, y1p, y2m, y2p, clkout_m, clkout_p.

Single Channel 8-Bit Data

YesFive groupsDifferential line, four signal lines, a set of clock lines. They are y0m, y0p, y1m, y1p, y2m, y2p, clkout_m, and clkout_p.

(2) Dual Channel

LVDS has a strong anti-interference capability when transmitting data with a high resolution. However, when the resolution is X or higher, a single path is overwhelmed, so there are two interfaces. The goal is simple. It accelerates the speed and Enhances Anti-interference capabilities.

Dual-channel 6-Bit Data

It is exactly twice that of a single channel, and the clock is also two channels. In red, the signals of y3m, y3p, y3m1, and y3m1 are not connected.

Dual-Channel 8-Bit Data

It is similar to the previous one.

Iii. EDP

This interface is unfamiliar. I have access to an ipad3 screen for HD screen, such as 2048*1536. This interface is also used for Goole N10 resolution 2536.

(Sorting ............)

Iv. mipi Interface

This company has products for use, but it is for other platforms, not for our debugging, and I have never touched on it. Just a moment. I think these interfaces are very similar: LVDS, EDP, HDMI, and mipi are all differential information + differential clock.

(Sorting ............)
5. Convert TTL (RGB) to LVDS

We have used two chips in the project: sn75lvds83b and thc63lvd827 (dual LVDS can be output), which are described in sn75lvds83b.

1. LCD relationship of sn75lvds83b, main control, and LVDS Interfaces

Shows the sn75lvds83b application:

In fact, it is to convert the TTL (RGB) signal output by the Samsung chip into the LCD receiver output by the LVDS differential signal.

The hardware interfaces are as follows:

2. Reference Circuit of sn75lvds83b

In fact, this part should pay attention to the number of LCD digits. Your screen is 16bit, 18bit, or 24bit. Different LCD digits have different hardware wiring methods. The wiring diagram of the AP end mentioned in Samsung exynos4412 when output in different bits.

(1) 24 bitrgb 24bit LCD

Note that five sets of differential signal lines and four sets of signals are used as a group of clock.

(2) 24 bitrgb 18bit LCD

Note that four sets of differential signal lines are used, and three sets of signals have a set of clock. y3m and y3p are NC. The connection modes of the ap rgb are also different, and the connections of 6 and 7 bits are grounded.

If you press the wiring method (24bit output) in (1), connect the 18bit screen. The RGB (solid color) signal of the 18bit screen is displayed normally, but the image or gradient is abnormal. I have been arguing with hardware for a long time, but it is good to solve the problem. Technical practice is a very important part. Some Misunderstandings may lead to mistakes in work.

6. Convert RGBEDP

We clicked a screen, but the resolution was too large. Our system was very stuck and finally stopped.

The circuit diagram is as follows:


The EDP signal is similar to that of LVDS, but an HPD signal is added.

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