Arm Assembly command MCR/MRC Learning

The MCR command transfers data from the ARM processor registers to the coprocessor registers. If the coprocessor fails to perform this operation, an undefined command exception is interrupted.

Syntax format of the command:

MCR {<cond >}p15, 0, <RD >,< CRN >,< CRM >{,< opcode_2>}

Mcr2 P15, 0, <RD>, <CRN>, <CRM >{, <opcode_2>}

<Cond> indicates the condition code of command execution. When <cond> is ignored, the command is executed unconditionally. In mcr2, <cond> is ob1111, and the command is executed unconditionally.

<Opcode_1> indicates the operation code of the operation to be performed by the coprocessor. For CP15 coprocessor, <opcode_1> is always 0b000. When <opcode_1> is not 0b000, the operation result of this command is unpredictable.

<RD> as the arm register of the metadatabase, its value is transmitted to the coprocessor register.

<RD> it cannot be a PC. When it is a PC, the command operation result is unpredictable.

<CRN> as the coprocessor register of the target register, its number may be C0, C1.... C15. <CRM> additional destination registers or original operand registers are used to distinguish different physical registers of the same number. When no additional information is required in the command, set C0 to <CRM>. Otherwise, the command operation result is unpredictable. <Opcode_2> additional information is provided to distinguish different physical registers of the same number. When additional information is specified in the command, <opcode_2> is omitted or set to 0. Otherwise, the command operation result is unpredictable.

The MRC command transfers the value in the coprocessor register to the ARM Processor register. If the coprocessor fails to perform this operation, an undefined command exception is interrupted.

Syntax format of the command:

MRC {<cond >}p15, 0, <RD >,< CRN >,< CRM >{,< opcode_2>}

Mrc2 P15, 0, <RD>, <CRN>, <CRM >{, <opcode_2>}

From http://blog.chinaunix.net/uid-26945045-id-3198519.html