Arm Instruction Set Overview

ADC addition carry incoming addition command data processing class Arithmetic Operation Command

Add addition instruction data processing class arithmetic operation instruction

And logic and data processing class arithmetic operation commands

BbranchBIs the simplest branch. OnceBCommand, the ARM processor will jump to the given address immediately and continue to execute from there. Note that the actual value stored in the branch command is an offset relative to the current R15 value, rather than an absolute address. The value is calculated by the assembler. It is a 24-bit signed number. After the two digits are left shifted, the symbol is extended to 32 bits, indicating that the valid offset is 26 bits (+/-32 m ).

Bitwise clearing is a method for clearing bits in a word, which is the opposite of bitwise setting. Operand 2 is a 32-bit mask (mask ). If a bit is set in the mask, this bit is cleared. Unconfigured mask bit indicates that this bit remains unchanged

Bic r0, R0, # % 1011; clears digits 0, 1, and 3 in R0. Keep the rest unchanged.

Bkpt break point breakpoint interrupt command

Compare the CEN compare negative with the negative value.

Oracle exception or command

LDC memory sends commands to coprocessor Datasets

LDM loads Multiple Memory commands

Data transfer commands from LDR memory to registers

MCR data transfer instruction from register to coprocessor register

MLA multiplication and addition operation commands

MoV data transmission command

Data transmission commands for MRC from coprocessor registers to registers

Mrs r0, cpsr_all; copy the dsrs Bic r0, R0, # & 1f; clear the mode bits Orr r0, R0, # new_mode; set the mode bits to MSR cpsr_all, R0; write back to the SRS, Change Mode

Mul: Multiplication

(Multiplication)

Mul {condition} {s} <DEST>, <OP 1>, <OP 2> DEST = op_1 * op_2

MULProvides 32-bit integer multiplication. If the operand is signed, it can be assumed that the result is also signed.

MlA: multiplication with accumulation

(Multiplication withaccumulate)

MLA {condition} {s} <DEST>, <OP 1>, <OP 2>, <OP 3> DEST = (op_1 * op_2) + op_3

MLAIs the same MULBut it adds the value of operand 3 to the result. This is useful when calculating the sum.

MVN: Transfer reverse Value

(Move negative)

MVN {condition} {s} <DEST>, <OP 1> DEST =! Op_1

MVNLoad a value from another register, a shifted register, or an immediate value to the destination register. The difference is that the bitwise is reversed before transfer, so a reverse value is transmitted to a register. This is a logical non-operation rather than an arithmetic operation. The value of this inverse plus 1 is its negative value:

  MVN     R0, #4                  ; R0 = -5  MVN     R0, #0                  ; R0 = -1　

Orr: logical or

(Logical or)

ORR {condition} {s} <DEST>, <OP 1>, <OP 2> DEST = op_1 or op_2

ORIt performs logic or on two operands and places the result in the destination register. It is useful for setting specific bits. Operand 1 is a register, operand 2 can be a register, a shifted register, or an immediate value:

ORR r0, R0, #3; Set R0 to 0 and 1

Or truth table (if there is 1 in the two tables, the result is 1 ):

Op_1 op_2 result 0 0 0 0 1 1 1 0 1 1 1

RSB: inverse Subtraction

(Reverse subtraction)

RSB {condition} {s} <DEST>, <OP 1>, <OP 2> DEST = op_2-op_1

SUBOperations TwoSubtract the operand OneTo place the result in the destination register. Operand 1 is a register, operand 2 can be a register, a shifted register, or an immediate value:

  RSB     R0, R1, R2              ; R0 = R2 - R1  RSB     R0, R1, #256            ; R0 = 256 - R1  RSB     R0, R2, R3,LSL#1        ; R0 = (R3 << 1) - R2

Inverse subtraction can be performed on a signed or unsigned number.

RSC: reverse subtraction with bits

(Reverse subtraction withcarry)

RSC {condition} {s} <DEST>, <OP 1>, <OP 2> DEST = op_2-op_1 -! Carry

Equivalent SBCBut the positions of the two operands are reversed.

SBC: subtraction with digits

(Subtraction withcarry)

SBC {condition} {s} <DEST>, <OP 1>, <OP 2> DEST = op_1-op_2 -! Carry

SBCSubtract two operands and place the result in the destination register. It uses the carry sign to represent the bitwise, so that the subtraction of more than 32 bits can be performed. SUBAnd SBCThe generate carry flag is different from the conventional method. ClearCarry flag. Therefore, the command must perform a carry flag NonOperation-This digit is automatically reversed during command execution.

Multiple Data Transmission commands (LDM and sTM) are used to load and store data of multiple words from/to memory.

The main purpose of LDM/STM is to copy the registers to be saved to the stack. As we have seen beforeSTMFD R13!, {R0-R12, R14}.

Command Format:

Xxm {condition} {type} rn {!}, <Register list> {^}

'Xx' indicates lD or St indicates storage.

Add four 'type' to eight commands:

Stack other ldmed ldmib pre-added after ldmfd ldmia load added ldmea ldmdb pre-reduced after ldmfa ldmda load reduced stmfa stmib pre-added storage stmea after stmia storage added memory FD slave dB pre-reduced storage after stmed stmda reduce storage

Tst: test Bit

(Test bits)

Tst {condition} {p} <OP 1>, <OP 2> Status = op_1 and op_2

TSTSimilar CMP, Does not generate results placed in the destination register. Instead, perform operations on the given two operands and reflect the results to the status mark. Use TSTTo check whether a specific bit is set. Operand 1 is the data word to be tested, while operand 2 is a bitmask. After testing, if it matches, set the zero flag; otherwise, clear it. Image CMP You do not need to specify SSuffix.

Tst r0, # % 1; test whether bit 0 is set in R0.

SWP: single data exchange

(SWAP)

SWP {condition} {B} <DEST>, <OP 1>, [<OP 2>]

Command Format

SWPSet:

• Load a word from the memory indicated by operand 2 and place the word in the destination register.
• Store the content of register operand 1 in the same address.

If the destination and operand 1 are the same register, the contents of the register are exchanged with the content at the given memory location.
If BIf the suffix is used, a byte is transmitted. Otherwise, a word is transmitted.

Arm Instruction Set Overview