ARM MOV pc Plus 8

Reason

Today, in analyzing arm pseudo-directive ADR, the book says that ADR is usually replaced by an Add or sub directive to achieve the same function. I disassembled it. This can be read to the register based on the relative offset of the PC, but the calculation finds no

As shown, ADR R2,BOB is replaced by the instruction SUB R2,PC,#0x0C .

Calculation

However, the figure shows that the PC value should be 8, after executing this statement, point to the next instruction address 12. But 8-12=-4, there is no result 4. If you want to get 4 results, the PC value should be 16, which is 8 larger than the theoretical value.

Why reading a PC value is 8 larger than expected

Read the manual http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204ic/Cihcdbca.html

Related Information https://stackoverflow.com/questions/24091566/ Why-does-the-arm-pc-register-point-to-the-instruction-after-the-next-one-to-be-e

ARM (ARM7) uses three-level pipeline structure, refer to, decode, execute, the PC always points to the address of the instruction you want to take, instead of executing an instruction and pointing to the address of the next instruction

When the first instruction enters the execution stage, the third instruction enters the reference stage, so pc+8.
In the execution of the first instruction, I thought that the value of the PC is 0, after executing the first instruction Pc+4=4 point to the address of the second instruction, but let me not intention is the first instruction in the execution phase, the third instruction at the point of reference, the PC takes the instruction address, so the PC is 8.

ARM9 uses five-level flow structure, but the PC is also added 8, why?

Although the ARM9 is a level five pipeline, but its first instruction of the implementation phase is also corresponding to the third instruction of the reference phase, so for the pc+8, more see references

Why does the PC value shown on my debugger not add 8

Look at the run, the PC shows the value for the next command to execute the address, and does not add 8 why?

It's easier to has the assembler/linker compensate for that 2-instruction offset than to design all the logic to ' correct ' The PC Register. That is, the assembler compensates for the display value of the R15 (PC), which makes the logic of "PC pointing to the address of the next instruction to be executed" seem reasonable.

How do you feel about this?

Disgusting! nasty!

ARM MOV pc Plus 8