ARM processor memory allocation details

 

ARM processor memory allocation details

The Samsung 2440 processor provides 1 GB access to external storage space, divided into 8
The size of each bank is 128 MB. The memory access bus width from bank1 to bank7 is programmable, which can be 8bit, 16bit, 32bit, and bank0 can only be 16bit/32bit. Bank0 to bank5 only have Rom and SRAM interfaces, which can be used for norflash and SRAM. The names of the selected eight pins are ngcsn (n
The value range is 0-7)

 

 

Startup Mode:

There are two startup modes in 2440, one is starting from nandflash, and the other is starting from norflash. The boot mode depends on the processor pins om1 and om0.

Norflash address bus connection mode

The connection between norflash address bus and arm address bus depends on the connection mode of the selected norflash address line. Currently, norflash on the market is generally compatible with 16-bit and 8-bit address modes, generally using 16-Bit mode. If 16-bit connection is used, the A0 address line of norflash is not used.

 

 

 

Connection between SDRAM and bus

 

Nand
Connection between flash and bus

Today, nor
Flash device prices are relatively high, and the increase is faster, SRAM and NAND
Flash became a low-cost Gold partner, so Samsung's 2440 processor independently developed the nandflash controller for norflash. In this way, we can not only use Samsung's stepstone technology to start nandfalsh, but also use nandflash as the storage. This is undoubtedly a huge news for cost-sensitive consumer electronics.

Nand reset Guide

Block diagram:

 

When the 2440 is reset, the NAND
The flash controller uses a 2440 processor (ncon (adv
Flash), gpg13 (page size), gpg14 (address cycle), gpg15 (Bus
Width) to determine the startup mode, page size, read/write address cycle, bus width, and then automatically read 4 k Data from nanflash to stepstone
Ram. The 4 K data is the startup code, and then from stepstone
Start Ram. ECC data verification is not performed when nandflash is started.

The following is a detailed configuration table:

 

Software access to the entire nandflash