Arm instruction coprocessor Processing Instruction

Arm supports 16 coprocessors. During program execution, each coprocessor ignores commands belonging to the ARM processor and other coprocessors. When a coprocessor hardware cannot execute commands belonging to her coprocessor, an undefined exception interrupt occurs. In the exception Interrupt Processing Program, the hardware operation can be simulated by software. For example, if the system does not contain the vector floating point generator, you can select a floating-point computing software simulation package to support vector floating-point operations.

 

Arm coprocessor Commands include the following three types:

1. Used for ARM processor initialization of arm coprocessor Data Operations

2: data transfer between ARM processor registers and arm coprocessor registers

3: It is used to transmit data between registers of the arm coprocessor and memory units.

 

These commands include the following five

CDP coprocessor data operation commands

LDC coprocessor Data Reading command

STC coprocessor Data Writing command

Data transfer command from MCR arm register to coprocessor register

Data transfer command from MRC coprocessor register to arm register

 

 

Usage:

CDP P5, 2, C12, C10, C3, 4; coprocessor P5 operation initialization, where the operation code 1 is 2, the operation code 2 is 4, and the target register is C12, source operand register bits C10, and C3

 

LDC commands read data from a series of consecutive memory units to the coprocessor register. If the coprocessor fails to perform this operation, undefined command exception operations will be generated.

Example: LDC P6, Cr4, [R2, #4]; R2 is the arm register. The command reads the word data of the memory unit r2 + 4 and sends it to the Cr4 register of the coprocessor P6.

 

 

STC (coprocessor Data Writing command)

The STC command writes data from the coprocessor register to some column memory units.

Instance: STC P8, cr8, [R2, #4]! R2 is the arm register,
The command writes the word data in the cr8 register of the coprocessor P8 to the memory unit (r2 + 4,
Then execute the R2 = r2 + 4 operation

 

 

 

MCR (data transfer instruction from arm register to coprocessor register)

The MCR command transfers data from the ARM Processor register to the coprocessor register. If the coprocessor fails to perform this operation, an undefined command exception is interrupted.

Instance MCR P14, 3, R7, C7, C11, 6; command transfers data from arm register to coprocessor p14 register,
R7 is the arm register, which stores the source operand, C7 and C11 coprocessors.
Register, which is the target register. The operation code 1 is 3, and the operation code 2 is 6

 

 

Data transfer command from MRC coprocessor register to arm register

The MRC command transfers the values in the coprocessor register to the arm register. If the coprocessor fails to perform these operations, an undefined command exception interruption will occur.

Instance MRC P15, 2, R5, C0, C2, 4; the command transfers the data in the P15 register of the coprocessor to the arm register,
R5 is the arm register, the target register, and C0 and c2 are the coprocessor.
Register, which stores the source operand. The operation code 1 is 2 and the operation code 2 is 4.

 

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