One:
CISC (Complex instruction Set computer) complex instruction computer CISC is the basic processing part of a desktop computer system, and the core of each microprocessor is the circuit that runs the instruction. A command consists of multiple steps to complete a task, transferring the value into a register, or adding an operation. CISC is a microprocessor that executes a complete set of computer instructions, originated in the 80 's MIPS mainframe (RISC machine), RISC machine used in the microprocessor collectively known as RISC processor. This allows it to perform operations at a faster rate (more millions instructions per second, MIPS). Because the computer performs each instruction type requires additional transistors and circuit elements, the larger the computer instruction set, the more complex the microprocessor and the slower the operation.
Two:
RISC (reduced instruction set computer, thin instruction set computer) is a microprocessor that performs fewer types of computer instructions, originating from the 80 's MIPS mainframe (RISC machine), the microprocessor used in RISC machine collectively referred to as RISC processor. This allows it to perform operations at a faster rate (more millions instructions per second, MIPS). Because the computer performs each instruction type requires additional transistors and circuit elements, the larger the computer instruction set, the more complex the microprocessor and the slower the operation.
John Cocke of the IBM Research Center in York, NY, showed that about 20% of the instructions in the computer bore 80% of the work, and in 1974 he proposed the concept of RISC. The first computer to benefit from this discovery was IBM's PC/XT in 1980. Later, IBM's RISC system/6000 also used this idea. The term RISC itself belongs to David Patterson, a teacher at the University of California, Berkeley. The concept of RISC has also been used in the Sun's SPARC microprocessor and has contributed to the creation of what is now known as MIPS Technology, which is part of the Silicon Graphics. Many current microchips now use the RISC concept.
The RISC concept has led to a deeper thought of microprocessor design. The design must take into account how well the instruction should map to the microprocessor's clock speed (ideally, an instruction should be executed within a clock cycle), the architecture needs to be "simple", and how much work the microchip can do without resorting to the help of the software, and so on.
In addition to performance improvements, some of the benefits of RISC and related design improvements are:
@ If one of the new microprocessors is less complex, its development and testing will be faster.
Programmers working with operating systems and applications that use microprocessor directives will find that using a smaller set of instructions makes code development easier.
The simplicity of @RISC allows for more freedom in choosing how to use the space on the microprocessor.
The high-level language compiler can produce more efficient code than ever before, because the compiler uses a smaller set of instructions on a RISC machine.
In addition to RISC, any full instruction set computer uses a complex instruction set calculation (CISC).
Typical examples of RISC such as: MIPS R3000, hp-pa8000 series, Motorola M88000, etc. are RISC microprocessors.
RISC Main Features:
RISC microprocessors not only simplify the instruction system, use superscalar and ultra-pipelined structure, their instruction number only dozens of, but greatly enhance the parallel processing capability. such as: 1987 Sun Microsystem Company introduced the SPARC chip is a superscalar structure of RISC processor. The MIPS processors introduced by SGI use the ultra-pipelined architecture, which plays a central role in building parallel streamlined instruction system multiprocessor.
RISC processor is the mainstream chip of 64-bit multiprocessor in UNIX field today.
Performance characteristics One: Because the instruction set simplifies, the pipeline and the common instruction all can use the hardware execution;
Performance characteristics of the second: the use of a large number of registers, so that most of the instruction operation is between the registers, improve the processing speed;
Performance characteristics Three: The use of Cache-host-external memory three-level storage structure, so that the number of numbers and the number of memory instructions executed separately, so that the processor can do as much as possible, and not because of the memory access information and slow processing speed.
application characteristics; Because RISC processor instruction is simple, the use of hard wiring control logic, processing power, fast, the world's most UNIX workstations and server manufacturers are using RISC chip for CPU. such as the original Dec Alpha21364, IBM's power PC G4, HP PA-8900, SGI r12000a and Sun Microsystem Company's Ultra Sparc║.
Operating features:
RISC chips typically operate at 400MHZ orders of magnitude. The clock frequency is low, the power consumes less, the temperature rises also is few, the machine is not easy to fail and the aging, improves the system reliability. A single instruction cycle accommodates multiple parallel operations. In the development process of RISC microprocessors. Has produced the ultra-long instruction Word (VLIW) microprocessor, which uses a very long set of instructions to link many instructions together to be executed in parallel. The basic model of the VLIW processor is the execution model of the scalar code, so that there are multiple operations within each machine cycle. Some RISC processors also use a few VLIW instructions to improve processing speed.
RISC and CISC are two typical technologies for the design and manufacture of microprocessors, although they are all trying to make some kind of balance in the aspects of architecture, operation, software hardware, compile time and running time, in order to achieve efficient purposes, but the methods used are different, therefore, in many ways the difference is very large, They are mainly:
(1) instruction system: RISC designers focus their energies on frequently used instructions and try to make them simple and efficient. For infrequently used functions, it is often done through a combination of instructions. Therefore, when you implement special functions on a RISC machine, the efficiency may be low. However, it can be improved and compensated by using pipelining technology and superscalar technology. and the instruction system of CISC computer is rich, has the special instruction to complete the specific function. Therefore, handling special tasks is highly efficient.
(2) Memory operation: RISC has limited memory operation, so the control is simplified, and the CISC machine has many memory operation instructions and direct operation.
(3) Program: RISC assembly Language Program generally needs a large memory space, the implementation of special functions when the program is complex, difficult to design, and CISC assembly language programming is relatively simple, scientific computing and complex operation of the program Society design is relatively easy, high efficiency.
(4) Interrupt: The RISC machine can respond to interrupts in the appropriate place where an instruction is executed, while the CISC machine responds to an interrupt after the execution of an instruction is completed.
(5) Cpu:risc CPU contains less unit circuit, so small area, low power consumption, and CISC CPU package contains rich circuit unit, so the function is strong, large area, power consumption.
(6) Design cycle: RISC microprocessor has simple structure, compact layout, short design cycle, and easy to use the latest technology; CISC microprocessor has complex structure and long design period.
(7) User: RISC microprocessor structure is simple, the instructions are structured, easy to grasp the performance, easy to learn and easy to use; CISC microprocessor has complex structure, powerful function and easy to realize special functions.
(8) Scope of application: Since the determination of RISC instruction system is related to the specific application field, RISC machine is more suitable for the special machine, while the CISC machine is more suitable for the universal machine.
Currently, RISC-using processors include Dec Alpha, ARC, ARM, MIPS, PowerPC, SPARC, and SuperH.
Three (RISC vs CISC):
RISC's design focuses on reducing the complexity of the hardware execution instructions, because the software is easier than hardware to provide greater flexibility and higher intelligence, so RISC design has higher requirements for compilers, and CISC's design is more focused on the function of hardware execution instructions, making CISC's instructions complex. In short, RISC requirements for compilers are high, CISC emphasizes the complexity of hardware, CPU implementation is more complex.
RISC Design thought guidelines:
1. Instruction set--risc processor reduces the kind of instruction set, usually a period of one instruction, that is, the period of the instruction is fixed, the compiler or programmer through a few instructions to complete a complex operation; the instruction length of the CISC is usually not fixed.
2. Pipeline-the essence of the pipeline is CPU parallel operation, but parallel operation is not as direct as in the FPGA, it just divides an instruction into a few smaller execution units; the execution of the CISC instruction requires the invocation of a micro-program, obviously without RISC instruction throughput.
3. Register--RISC Registers have more general-purpose registers, more register operations, such as ARM with 27 registers, CISC registers are used for a specific purpose.
4. Load-store structure--the processor only processes data in registers, because accessing the memory is time consuming, while reading and writing to the external memory affects its lifespan; CISC can run directly in memory
5. Addressing is simplified, not as complex and numerous addressing methods as CISC
First, background knowledge:
The strength of the directive is an important indicator of the CPU, and instruction set is one of the most effective tools to improve the efficiency of microprocessors. From the current mainstream architecture, instruction set can be divided into complex instruction set (CISC) and thin instruction set (RISC) two parts. Accordingly, micro-processing with the complexity of micro-instructions can also be divided into CISC and RISC two categories. The
Cisc is a wafer design system designed to facilitate programming and improve memory access efficiency. Before the mid 1990s, most microprocessors used the CISC system-including Intel's 80x86 and Motorola's 68K series. That is to say, the X86 architecture belongs to the CISC system. RISC is a wafer system designed to improve the speed of processor operation. Its key technology is pipelining (pipelining): Multiple instructions are completed in one clock cycle. And the ultra-pipeline and superscalar technology has been widely used in wafer design. RISC systems are used in non-x86 camp high-performance microprocessor CPUs. such as the Holtek MCU series. ARM (Advanced RISC machines) can be thought of as a company name, or as a generic term for a class of microprocessors, or as a technology name. The ARM architecture is now recognized as the industry's leading 32-bit embedded RISC microprocessor architecture. All ARM processors share this architecture. Therefore, we can compare the X86 instruction set with the arm instruction set from the comparison of the system that belongs to it.
Ii. Comparison of CISC and RISC
(i) CISC
1. The instruction features of the CISC system use micro-code. The instruction set can be executed directly in the micro-code memory (much faster than the main memory), the newly designed processor can execute the same instruction set simply by adding fewer transistors, or it can quickly write a new instruction set program. A large instruction set. You can reduce the number of lines of code required for programming and reduce the burden on your programmers. Instruction set for higher-order languages: includes dual-operation meta-format, register-to-register, register-to-memory, and memory-to-register instructions.
2. Advantages and disadvantages of the CISC system: the ability to effectively shorten the design time of the new instruction, allowing designers to achieve the CISC system machine upward compatibility. The new system can use a set of instructions that contains an earlier system, and it can use the same software that was used on earlier computers. In addition, the format of the micro-program is matched to the higher-order language, so the compiler does not have to rewrite it. Disadvantage: The instruction set and the chip design are more complex than the previous generation product, different instructions need different clock cycles to complete, the implementation of slower instructions, will affect the performance of the entire machine.
(ii) RISC
1. The instruction feature of RISC system is simplified instruction set: it contains simple and basic instruction, which can be combined into complex instruction through these simple and basic instructions. Instructions of the same length: the length of each instruction is the same and can be done in a single operation. Single Machine cycle instruction: Most instructions can be done in a machine cycle and allow the processor to execute a series of instructions at the same time.
2. The advantages and disadvantages of RISC system: The RISC system will run at the same speed as CISC, using the same wafer technology and the same running clock. Since the instruction set of RISC processor is streamlined, its memory management unit, floating point unit and so on can be designed on the same chip. RISC processors are simpler to design than corresponding CISC processors, require less time, and can use more advanced technologies than CISC processors to develop faster next-generation processors. Cons: Multi-instruction operations make it possible for programmers to carefully choose the right compiler, and the amount of code they write will become very large. The other is that RISC processors require faster memory, which is usually integrated inside the processor, or L1 cache (first-level cache). As described above, to further compare the differences between CISC and RISC, the following points can be analyzed:
1, the formation of instructions CISC because of complex instructions, so the design of micro-command control unit, and RISC instruction 90% is done directly by the hardware, only 10% of the instructions are composed by the software to complete the way, so the instruction execution time RISC is shorter, but RISC required ROM space is relatively large, The size of RAM usage should be relative to the application of the program.
2, Address mode CISC need more addressing mode, and RISC only a few of the addressing mode, so the CPU in the calculation of the memory effective address, CISC occupy more bus cycles.
3, the instruction period CISC instruction format varies, the execution of the cycle times is not uniform, and RISC structure is just the opposite, it is suitable for the design of pipeline processing architecture, and can achieve an average one-week direction to complete an instruction. Obviously, in the design RISC is simpler than CISC, at the same time because of the cisc of the execution of too many steps, idle unit circuit waiting time growth, not conducive to parallel processing design, so in terms of performance RISC than CISC or stand the upper hand, but RISC because of the instruction after the simplification of the application code becomes larger, Requires a large program memory space, and there are many kinds of instructions, such as the shortcomings.
4. Heavy use of registers
(iii) X86 instruction set and arm instruction set:
(1) X86 instruction set: The X86 instruction set is specifically developed by Intel for its first 16-bit CPU (i8086). Later in the computer to improve the floating-point data processing capacity of the X87 chip series of mathematical coprocessor additional use of the X87 directive, the X86 instruction set and X87 instruction set will be collectively known as the X86 instruction set. Although with the development of CPU technology, Intel has developed a new i80386, i80486, but in order to ensure that the computer can continue to run the various applications developed in the past to protect and inherit rich software resources, so all the CPUs produced by Intel company still continue to use the X86 instruction set , so its CPU still belongs to the X86 series. Because the Intel X86 series and its compatible CPUs all use the X86 instruction set, they form today's vast X86 series and compatible CPU lineup. In addition to the many features of the above CISC, the X86 instruction set has several prominent drawbacks: the
L Universal Register Group ———— impact on the CPU core structure The X86 instruction set has only 8 general-purpose registers. Therefore, CISC CPU execution is most of the time in accessing the data in memory, not in registers. This slows down the entire system. RISC systems tend to have a lot of universal registers, and the use of overlapping register windows and register heap technology to make the register resources are fully utilized. The
L decodes ———— effect on the external core of the CPU decoder (Decode Unit), which is something x86cpu. The function is to convert the variable-length x86 instruction to a fixed-length, RISC-like instruction, and pass it on to the RISC kernel. Decoding is divided into hardware decoding and micro-decoding, for simple x86 instruction as long as the hardware decoding can, faster, and encountered the complex x86 instructions need to be micro-decoding, and it is divided into several simple instructions, the speed is slow and very complex. Athlon or PIII, the old-fashioned CISC's X86 instruction set severely hampered their performance. A small
L addressing range-constrains the user's need even though AMD has developed a x86-64 architecture, while addressing some of the drawbacks inherent in traditional X86, such as the expansion of addressing ranges, this improvement does not directly result in a performance improvement.
(2) ARM instruction set: In comparison, the instruction format of a RISC-based arm instruction set is uniform, with less variety and less addressing than a complex instruction set. Of course, processing speed is much higher. The ARM processor is known as a streamlined instruction set processor (RISC). All of its instructions are made up of simple instructions, which means that the corresponding hardware line can be optimized as much as possible, and the execution rate is increased, relative to the shortest time required for an instruction. Because of the simplification of the instruction set, many of the tasks must be combined with simple instructions, while the work for the more complex combination needs to be performed by the "compiler" (compiler), and the X86 instruction set of the CISC system is due to the large number of instruction sets provided by the hardware, So many jobs can be replaced by one or several instructions, and compiler's work is reduced a lot. In addition to the many features of RISC described above, some other features of the arm instruction set architecture can be summarized as follows:
L ARM features
1. Small size, low power consumption, low cost, high performance
2. Support for Thumb (16-bit)/arm (32-bit) dual instruction set, good compatibility with 8-bit/16-bit devices;
3. A large number of registers are used, and instructions are executed more quickly;
4. Most data operations are done in registers,
5. The method of addressing is flexible and simple, and the execution efficiency is high;
6. The instruction length is fixed;
7. Pipeline processing Method
8. Load_store structure L arm of some non-RISC ideas of the instruction architecture: 1. Allows a variable number of execution cycles for certain instructions to reduce power consumption and reduce area and code size. 2. A bucket shifter is added to extend the functionality of certain instructions. 3. The 16-bit thumb instruction set is used to increase the code density. 4. Use conditional execution directives to improve code density and performance. 5. The function of data signal processing is realized by using the enhanced instruction.
(iv) Summary: Therefore, a large number of complex instructions, variable instruction length, a variety of addressing the characteristics of these cisc, but also the shortcomings of CISC, because these have greatly increased the difficulty of decoding, and in the current high-speed hardware development, the complexity of instructions brought about by the speed of the increase in the decoding time is not wasted. In addition to the personal PC market with the X86 instruction set, servers and larger systems have long been CISC. The reason x86 still exists is to be compatible with a large number of software on the x86 platform, and the implementation of its architecture composition is not too difficult. The most characteristic of the arm instruction of RISC system is that the instruction length is fixed, the type of instruction is few, the type of addressing is few, most of them are simple instruction and can be completed in one clock cycle, so it is easy to design superscalar and pipelining, many registers and a large number of operations between registers. The advantage is self-evident, therefore, the ARM processor becomes the current most popular processor family, is one of several mainstream embedded processing architecture. RISC is now at its zenith, and Intel seems to eventually abandon x86 to RISC architecture. In fact, with the RISC processor in the embedded field, the traditional X86 series CISC processor in the positive improvement of Intel Company also overcome the problem of high power consumption, become some high-performance embedded devices, the best choice, developed to today, The boundaries between CISC and RISC are no longer so distinct, and RISC's own design is becoming more complex (not entirely based on CISC's ideas), because all the CPUs that are actually used need to constantly improve performance, so adding new features to the architecture is unavoidable. On the other hand, processors that were originally considered CISC architectures also absorbed many of the advantages of RISC, such as the RISC architecture used in the internal implementation of the Pentium processor, where complex instructions were internally broken down into multiple thin instructions, but for the outside of the processor, To maintain compatibility or to display it in a CISC-style instruction set.
ARM instruction System (risc| CISC)