Arm startup code (1): Introduction

Many of my friends are engaged in embedded systems, and there is no problem in writing code. When I finally debug the board, I got down. The reason is that there is a problem with the chip startup address, startup mode, and the connection between Bootloader and the operating system. Today, I will talk about this issue.

What do we care about most about a new processor? It does not support C compilers, and does it have a good development environment. From the programmer's point of view, to thoroughly understand a new processor, you must understand two things: a) memory model of the new processor; B) interrupt mode and interrupt source of the new processor. Take at91sam9260 of arm as an example.

An ARM chip may have n different boot methods, including starting from SPI flash, norfalsh, nandflash, and in-chip Rom. Some operating systems, such as VxWorks and ECOs, also support various startup methods. If you do not understand the memory model, these methods are considered completely different. However, from the eyes of experienced embedded software engineers, these methods are actually extended. After an arm is powered on, it enters the SVC mode, interrupts and closes, and executes the code from 0x0.
Let's take a look at the question: what bus does SP flash and nandflash use? SPI and 8bit or 16bit can be used in the code to access the content in SPI flash and nandflash through simple assignment and address methods? No. To read SPI Flash/nandflash, write the command to SPI Flash/nandflash, then prepare the buffer, and refresh the data. All of these cannot simply access the storage unit through a LDR or str command. In professional terms, spiflash/nandflash is not designed in a unified manner with the system. After an instance is powered on, arm runs at 0x0. Therefore, arm cannot obtain data at 0x0 in complex ways and can only perform simple bus operations. That is to say, if you want to use spiflash/nandflash to start arm directly, it's a fantasy ...... Why can some arm use spiflash/nandflash to start the system? At91sam9260 is such a chip.

Let's take a look at the storage structure of the at91sam9260 chip: 0x0 ~ 0x0fff FFFF is internal memories, which is the memory inside the chip. 0x0 ~ 0x0f FFFF is Boot memory, 0x10 0000 to 0x10 7fff is Rom. 0x20 0000 ~ 0x20 0fff is sram0, 0x30 0000 ~ 0x30 0fff is sram1. What is Boot memory? Boot memory is an idle address. You can map sram0 and Rom to this address, that is, use the control register to select ROM and sram0 to map to the boot memory location. If you access the boot memory address, that is, the ROM or sram0 address mapped to this location. For example, if the boot memory is mapped to sram0, the access location 0x10 is equivalent to the location 0x20 0010. After a chip is powered on, the default ing is Rom. What is Rom? It turned out to be a piece of startup code defined by ATMEL 9260, which is fixed at the factory. It will look for dataflash (a flash of ATMEL), load bootloader from flash, or find nandflash, norflash, and load bootloader.

When the arm powers on, it starts from memory 0x0. 9260 maps the Rom to the boot memory location, that is, the code in the executed Rom. Load bootloader from peripherals. This process has been successfully completed. Boot memory is often visible in ARM7 to solve arm startup and exception vector problems. It is a perfect solution.

Here, we can understand that, in fact, loading applications through nandflash/SPI Flash/UART/network, in fact, arm bare metal cannot be done, and the arm method must be told. That is to say, we have to write a program to tell Arm what port and how to load the correct code into memory. To understand this, you need to find out the address, that is, to load something to what location. In fact, this problem is not complicated. The key is to clarify some concepts.

1. Our code is loaded to the location where the chip's uniform address is located. This address is visible throughout the chip.
2. Our code is stored on a non-uniform device such as SPI flash and nandflash. Where does the Code address start on these devices? In fact, this address is no longer a unified programming address for arm. You only need the programmer to understand it, write the driver, and load it from the specified location. If the driver has been written by the manufacturer, the address is fixed. For programmers, writing code to nandflash/SPI flash cannot be used as they wish, because the starting address of the driver cannot be changed.
3. Format of the loaded code. For the original binary format, refer to 1. But if it is an elf file, it is a little troublesome: the ELF file contains each piece of data loaded to the chip, but in any case, the idea is the same, load suitable code to a specific Chip Location.

The locations for modifying these addresses are also different. bootloader can configure the location where the target is loaded, the location where the target code is obtained, and the method for obtaining the target code; the tool link script can modify the location of each segment (Data Segment, code segment. The chip selection signal of the hardware also determines the location of the unified device addressing. Therefore, when designing the arm startup code, we should not look at the chip data in an isolated manner, so we should consider it globally.