Arm9_s3c2440 Learning (5) norflash start, nandflash start, and SDRAM conclusion

 

Start norflash and start nandflash. Summary of SDRAM

The first command read during the startup of S3C2440 is 0x00, which can be started on NAND Flash and nor flash.

 

Nand flash: suitable for large-capacity data storage, similar to hard disks;

Nor FLASH: suitable for small-capacity programs or data storage, similar to small hard disks;

SDRAM: Mainly used for program storage, execution, or computing during program execution, similar to memory.

 

Nor Flash has its own address line and data line. It can adopt Random Access similar to memory and run programs directly on nor flash. Therefore, nor flash can be directly used for boot, when nor flash is used, the address is mapped to 0x00.

NAND Flash is an I/O device, and data, address, and control lines are shared. The read time sequence must be controlled in the software area. Therefore, it cannot be accessed randomly like nor flash or memory, it cannot be an EIP (running on a chip), so it cannot be directly used as a boot.

Nandflash startup: The nandflash controller automatically loads the first 4 K of nandflash memory to steppingstone (internal SRAM buffer), and sets 0x0000ipvs as the starting address of internal SRAM, the CPU starts from 0x00000000 of the internal SRAM. No program interference is required in this process.

(The CPU automatically reads the first 4 kb of data from the NAND Flash and stores the data in the On-Chip SRAM (the S3C2440 is the SOC ), at the same time, the SRAM in this segment is mapped to the space selected by the ngcs0 segment (that is, 0x00000000 ). The CPU is executed from 0x00000000, that is, the first 4 kb of content in NAND Flash. Because NAND Flash does not connect to the address line, you cannot directly map the NAND to 0x00000000, so you have to use the on-chip SRAM as a carrier. Use this carrier to copy the code in nandflash to Ram (usually SDRAM) for execution ).

What programmers need to do is to put the core code in the first 4 K of nandflash. 4 K code copies the core configurations of S3C2440 and the rest of the startup code (u-boot) to the SDRAM.

The 4 K startup code needs to copy the content in nandflash to the SDRAM for execution. The startup code is stored in the first 4 K space of nandflash, and the speed of SDRAM is fast, which is used to execute the code of the main program. Arm generally starts initialization from Rom or flash, copies the application to ram, and then jumps to ram for execution.

 

Norflash startup: xip or code can be directly executed on nor flash without being copied to the memory. This is because the norflash interface is identical to Ram and can randomly access any address data. Norflash is fast and data is not easy to lose. It can be used as a storage for storing and executing code and applications. norflash can read operations like memory, but it is very inefficient to clean and write operations, the memory size is far lower than that of the memory. Generally, the Assembly command is used to initialize the external memory component (external memory SDRAM) at the beginning of the code, and the execution is continued in the external memory. For a small program, it is usually burned into nandflash, and the internal RAM (SRAM) of the CPU is used for direct cloud migration.

Nor flash is mapped to the 0x00000000 address (ngcs0, which does not need in-chip SRAM to assist, so the starting address of the in-chip SRAM is still 0x40000000 ). then the CPU starts from 0x00000000 (that is, it is executed in norfalsh ).

. Norflash is fast and data is not easy to lose. It can be used as a storage for storing and executing code and applications. norflash can read operations like memory, but it is very inefficient to clean and write operations, expensive. The prices of SDRAM and nandflash are moderate. Root

According to these characteristics, some people have come up with the idea that the startup code is executed in the external nandflash, and the main program is executed in the SDRAM. The nandflash controller automatically loads the first 4 K of nandflash memory to steppingstone (internal SRAM buffer), sets 0x0000ipvs as the starting address of internal SRAM, and starts the CPU from 0x00000000 of internal SRAM, no program interference is required in this process. The 4 K startup code needs to copy the content in nandflash to the SDRAM for execution. The startup code is stored in the first 4 K space of nandflash, and the speed of SDRAM is fast, which is used to execute the code of the main program. Arm generally starts initialization from Rom or flash, copies the application to ram, and then jumps to ram for execution.