Assembly language Writing DOS memory-resident program (1)

Introduction
0.1 memory resides and interrupts
Memory-resident program the English name terminate and Stay resident program, abbreviated as TSR. These programs are loaded into memory, and when they are done, they reside in memory and are transferred to the foreground when the conditions are met.
Common forms of memory-resident programs are:
> Sidekick pop-up utilities such as Borland
> Calendar System
> Web Server
> Communication Procedures
> Local DOS extensions (such as Ccdos,ucdos and other Chinese systems are part of this category)
> Some hateful people use TSR technology to make a lot of nasty virus programs, almost all virus programs are TSR programs.
Like multitasking system scheduling a process has a scheduler, in the PC from the foreground program into a TSR, but also have a dispatcher, but the PC operating system scheduling is not known as the scheduler, It's called trigger mechanism. Trigger mechanism to dispatch TSR execution on the PC the party is called activating a TSR. The triggering mechanism mainly has the following kinds:
> Hardware interrupts: The party uses keyboard interrupts int 9H, clock interrupts int 8H, communication interrupts int 14H, disk interrupts int 13H, and so on.
> Software interruption: The party uses keyboard interrupts int 16H, clock interrupts int 1ch,dos interrupts int 21H, and so on.
> above a variety of combinations.
From the above triggering mechanism, we can see that there is a close relationship between TSR and PC interrupt system. Each activation method is actually related to the interrupt. The identification code of the usual special keystroke sequence is achieved by intercepting int 9H and int 16H. In fact, regardless of which part of the TSR program, Are closely related to interruptions. Therefore, the PC interrupt system is introduced before the implementation of TSR and program design. Here is a brief explanation.
In 1K bytes of the lowest end (0000H) of PC memory, 256 pointers are often said to be vectors or interrupt vectors (Interrupt vertor), and each interrupt vector points to a subroutine called an interrupt handler (Interrup handler). One interrupt vector consists of four bytes, and one word is the offset value of the interrupt handler, and the last word is the segment value of the interrupt handler. The 256 interrupt vectors are called interrupt vector tables together.
The first address of a hand-calculated interrupt vector can be obtained by using the following formula:
First address =0000h:x*4 of X interrupt vectors
When an interrupt is generated, the processor performs the following steps sequentially:
> The label that presses the processor on the stack (equivalent to the instruction PUSHF).
> presses the current CS and IP values on the stack (equivalent to the command push CS and push IP).
> Shutdown interrupt (CLI)
> executes the interrupt handler from the CS and IP loaded from the interrupt vector.
When the interrupt handler is executed, it is generally returned with iret, and its function is:
> Remove the saved IP and CS from the stack (equivalent to the command POP CS and push CS).
> Restore the Processor flag (equivalent to the instruction Popf) before the interrupt.
Interrupts are categorized by the causes of the triggering and the nature of the implementation, which can be divided into hardware interrupts and software interrupts, which can be divided into BIOS interrupts, BOS interrupts, and user interrupts from the operating system layering implementations.
On the one hand, BIOS and DOS provide the user with an operating system functional interface through an interrupt system. That is, the function of the user (generally the foreground program) is realized by invoking the DOS and BIOS interrupt service, specifically through the int instruction. On the other hand, BIOS and DOS are made up of interrupt systems, and the BIOS is a high-level feature of the hardware and is provided to the user in the form of interrupts.
If the current program executes at the same time, can put a piece of code in memory, the interrupt vector to the subroutine in the code, then in the current execution of the program when the interruption, it is possible to execute the code that is not part of the current program and operating system, the resulting interruption may be the current program generated software interruption, It is also possible that hardware-generated hardware interrupts. This is a simple description of a single-task PC operating system that may perform more than one process.
There are several interrupts in the PC interrupt system that are periodic, that is, int 8h,int 1CH and int 28H. They are either periodically executed for time timings, or periodically generated for waiting. They are the basis for polling triggers when implementing TSR. Keyboard interrupts (int 9H and int 16H) Occurs when the user keystrokes, using them as a basis for hot-key processing. Serial port communication is also an important mechanism of triggering. In addition, numerous software interrupts are also the trigger media.

Analysis of 0.2 dos scalability
A multitasking operating system allows multiple to coexist, because most of the code of the operating system can be heavy, the corresponding PV operation for the critical resources, so that when scheduling a new process, can completely save the previous mileage of the scene, when the process is again scheduled to be suspended as the same as without interruption to continue execution .
For the PC, the code is less reentrant and has no PC operation on the critical resource. When we start the user's TSR with an interrupt program, if we save only the flags and registers, and some information about the current process, only a portion of the current program is saved, The critical resource for DOS is not saved automatically. In the design of TSR, it is necessary to understand the PC operating system's reentrant and critical resources.
Re-entry is always reflected in the code, the so-called reentrant code refers to such code, that is, the code has not yet exited from the execution, for some reason again or more to enter the same code, the code each time the execution of the result is correct, that the code is reentrant. Conversely, if the results are not correct, Then the code is not reentrant. Here is an example of a reentrant subroutine:
ADD proc Near
CMP Ds:word PTR [si],0
Je donotaddthevalue
Add Ax,ds:word ptr [si]
Donotaddthevalue:
Ret
ADD ENDP
The above example executes the subroutine again, regardless of where it is executed again. To illustrate, just one of many possibilities.
mov ds,0100h;d s=0100h
mov si,0010h; si=0010h
mov ax,0001h; ax,=0001h
Call ADD
CMP 0100h:word ptr [0010h],0; Call Add subroutine
Push DS; Interrupted
Push SI
Push AX
mov ds,0200h;d s=0200h
mov si,0200h; si=0020h
mov ax,0003h; ax=0003h
Call ADD
CMP 0200h:word ptr [0020h],0; 0200:0020h=0004h
Jne
Add Ax,0200h:word ptr [0020h]; ax=0007h
RET; Return
Pop ax; ax=0001h
Pop si; si=0010h
Pop ds;d s=0100h
Iret; Return to Add subroutine