Basic components and working principles of computers-2

1.3 Basic components and working principles of computers

Basic Components of hardware: memory, controller, memory, input device, and output device

The memory and controller have been integrated into the CPU

ALU is a component used to process data. It can complete both arithmetic operations and logical operations. Therefore, it is called an arithmetic logic component.

Controller: The main function is to extract and analyze commands from the master memory, and control all components of the computer to complete the command function in an orderly manner.

Memory: memory is composed of memory and external memory. In order to improve the operating speed of the entire system, memory such as registers and high-speed cache must be set in the computer.

Input and Output: A device for information exchange between computer systems and the outside world. Generally, the host and I/O devices are organically combined through bus and interfaces.

1.3.1 Bus

Basic concept: Bus is the information transmission channel connecting multiple devices. It is actually a set of signal lines. In a broad sense, any wire connected to more than two electronic element devices can be called bus,

Bus is generally divided into four categories:

(1) chip internal BUS: Used for the internal and partial connection of the Integrated Circuit Chip

(2) component-level Bus: Used for the connection of each component in a circuit board

(3) internal BUS: Also known as system bus. Used to connect components of a computer (including CPU, memory, and interfaces)

(4) external line: Also known as the communication bus. Used for connection or communication between a computer and a peripheral or between a computer and a computer.

Common internal bus standards: (to be supplemented)

(1 ). ISA bus. ISA is an industrial standard bus.

24 address lines, 16 data lines, and control bus. Plus or minus 5 V, plus or minus 12 V power supply and ground

(2 ). EISA Bus: ISA bus upgrade

(3 ). PCI bus. PCI bus is a widely used internal bus on micro-computers.

Common External Bus Standards

(1 ). RS-232C: is a serial external bus. 3 lines in total (sending, receiving, and location)

(2 ). SCSI bus. Small computer system interface, parallel external bus. It is widely used to connect hard and hard disks, CDs, scanners,

(3 ). USB, Universal Serial Bus, USB 1.5 Mb/s_12Mb/s USB 2.0480 Mb/s

Maximum advantage: plug-and-play and hot swapping are supported.

(4 ). IEEE-1394 is also a serial data transmission protocol,

CPU Composition

The CPU consists of four main components:

Receiver, controller, register group, internal BUS

Generator (ALU): Mainly used to complete arithmetic and logical operations.

Among them, the most basic structure is: arithmetic and logical operation units, accumulators (AC), State word registers (PSW), register groups, multi-channel converters and other logical components

Register group: The address used for temporary operation or data storage. A sign register is also called a State register. It is used to store state information generated during arithmetic and logical operations.

Accumulators: one of the main registers in the calculator, used to store calculation results and provide calculation objects by ALU.

Controller: The main function is to extract commands from the memory, point out the location of the next command in the memory, send the obtained commands to the instruction register, and start the instruction decoder to analyze the commands, finally, the corresponding control signal and timing information are sent.

Controller composition: program counter (PC), instruction register (R), instruction decoder, status word register (PSW), time series generator and micro-operation signal generator. Consists of six parts.

 

Main functions of the Controller

(1). program counter: when the program is executed sequentially, each command is taken out, and the PC content automatically adds a value pointing to the next command. When a transfer occurs in the program, the transfer address is sent to the PC, and then the PC points to the new program address.

(2 ). Command register: stores executed commands

(3 ). Instruction decoder: analyzes the current instruction.

(4 ). Time Series components: used to generate time series pulses and cycle potentials to control the orderly operation of various computer components

(5 ). Status word register: used to save the condition code generated after the command execution is complete, such as whether the operation overflows or not.

(6) micro-operation signal generator: generates the provided time series signal based on the Operation signal and time series provided by the command. Its basic function is to obtain and execute commands from memory.

** Steps for executing commands

(1) obtain the command. The Controller first extracts an instruction from the memory according to the instruction address specified by the program counter.

(2) Instruction Decoding: Send the operation code to the instruction decoder for analysis, and then issue control commands to the relevant components according to the instruction function.

(4) execute by command operation code: analyze the operation commands generated by the Command Based on the command decoder and the status of the program status word register, control micro-Operations form a series of internal control signals of the CPU and output to the external control information of the CPU

. The specific functions of commands are implemented under the control of these control signals.

(5) form the next instruction address. If it is not a transfer instruction, modify the content of the program counter. If it is a transfer instruction,

The program counter content is modified according to the transfer condition. *

3. Register Group

A register is an important part of the CPU. It is a temporary storage unit inside the CPU. By adding the number of registers to the CPU, the CPU can make the data required for executing the program as much as possible.

It is stored in registers to reduce the number of accesses to the memory and improve its running speed.

The registers in the CPU are generally divided into the registers that store data.

Register that stores the address

Registers for storing control information

Registers for storing status information include other registers.

Accumulators: The accumulators are a data register that temporarily stores the result of operations by the operands and early morning. They cannot be used to store a data record for a long time.

General Register group: a general register group is a group of work registers in the CPU. It is used for temporary operation operations or addresses.

Sign register: a sign register, also known as a State character register, is used to record the sign information generated during operations. Each bit in the status register is used separately, which is called a flag,

The value of BITs reflects the current operating status of ALU and can be used as the transfer condition of the conditional transfer instruction. The typical flag BITs include the following.

Carry flag (C): Place 1 when the highest bit of the computing structure is generated

Zero sign (Z): Set 1 when the calculation result is zero;

Symbol flag (S): set to 1 when the calculation result is negative;

Overflow flag (V): set to 1 when the calculation result overflows;

Parity flag (P): Set 1 when the number of 1 in the calculation result is an even number;

Command register: The command register is used to store running and commands. commands are taken out of the memory and sent to the command register,

Data Buffer register (MCM): used to temporarily store a command or data word read from internal memory.

Address Register (MAR): used to save the address of the memory unit accessed by the current CPU.

There is a difference in the operation speed between CPUs, so the address register must be used to keep the address information until the write/write operations in the memory are completed.

4. Internal Bus

The CPU bus connects the inner, Controller, and register group.

CPU diagram;

 

1.3.3 Storage System

1. Storage Classification

(1 ). Memory can be divided into memory and external memory by memory location.

(2). materials consisting of memory can be divided into magnetic memory, semiconductor memory and optical memory.

(3) read/write memory and read-only memory can be divided by working mode

(4) access methods can be divided into memory accessed by address and memory accessed by content

(5 ). Random storage, sequential storage, and direct storage by addressing

2. Storage System Hierarchy

 

Among them, high-speed cache is the fastest, followed by primary memory (MM)

At the lowest level, the (external memory) speed is the slowest.

3. Primary Storage

The primary storage is referred to as the primary storage, memory, and is located on the host or motherboard. It is used to store the programs and data required for the current running of the machine,

Main Memory composition: mainly includes storage body, control thread, address register, data register and address decoding

 

Storage body: storage space for storing programs and data

Address Register: used to store the address code of the storage unit to be accessed provided by the address bus. The number of digits N of the Address Register determines the number of addressable storage units M, that is

M = The Npower of 2

Data Register: used to store the data to be written to or read from the storage body

Decoding circuit: Find the corresponding address code in the storage body based on the address code stored in the address register.

.

Control Line: Based on read/write commands, control the coordination of all parts of the primary memory to complete the corresponding operations.

Primary storage performance indicators

1. memory capacity.

2. Storage Time

3. bandwidth refers to the data transfer rate of the memory, that is, the number of data records transmitted per second.

4. High-speed cache

Features:

The Cache is located between the CPU and the primary storage, with a small capacity, generally between several KB and several MB.

The speed is generally 5-10 times faster than the primary storage,

The content is a copy of the primary content.

2. Cache Composition

The Cache consists of the control part and the Cache storage part.

Control part: determines whether the information to be accessed by the CPU is in the Cache memory

5. external memory. Slow speed, large capacity, persistent Storage

Disk Storage

Hard Disk

USB mobile hard drive

Disc Storage

A storage device for recording high-density information without contact with a focused laser beam on a disc media

1.3.4 Input and Output Technologies

The input/output (I/O) system is the channel for data exchange between the computer and the outside world. The host and I/O devices are not simply connected by the system bus, also required

Control.

1. Functions and categories of interfaces

1 ). Interface

In a broad sense, an interface refers to the connected part between two relatively independent systems and is also called an interface. Because the host is relatively independent from various I/O devices, generally, they cannot be directly connected. They must go through a conversion mechanism, that is, the I/O interface circuit, or I/O interface for short.

 

(1 ). Address decoding function. Since a computer system is connected to multiple I/O devices and there are multiple corresponding interfaces, different address codes must be assigned to them for difference and selection, this is the same as the storage unit addressing in memory.

(2) Exchange data, control commands, and status information between hosts and I/O devices.

(3) Support for program query, interrupt and DMA access to hosts

2) data transmission formats can be divided into parallel interfaces and serial interfaces.

Both interfaces and I/O devices transmit data in parallel.

Serial interfaces are transmitted in serial mode.

Parallelism is used between the serial interface and the host.

Conclusion: The parallel interface is applicable to the scenarios where the transmission distance is near and the speed is relatively high.

Relatively simple; the serial interface is suitable for scenarios where the transmission distance is far and the speed is relatively low.

(2) According to the control mode of host access to I/O devices, it can be divided into program Query Interfaces,

Interrupt Interface, DMA interface, and more complex channel controller, I/O processor

(3) time series control methods can be divided into synchronous interfaces and asynchronous interfaces.

It should be noted that a complete I/O interface includes not only some hardware circuits, but also

Includes related software drivers.

1. connection between the host and peripherals

In different computer systems, the connection modes between hosts and I/O devices may be different. Common connection modes include bus, Star, channel, and I/O processor, the bus mode is the basic connection mode.

A bus is a set of information transfer lines that can be shared by multiple components at a time. It is used to connect multiple components.

It also provides information exchange channels. Sharing means that all components connected to the bus can pass information through it. Time-sharing means that only one part can send data at a certain time point.

It is sent to the bus. Therefore, sharing is implemented by time-sharing.

The bus is not only a set of signal lines, but also related protocols. To achieve time-sharing,

Therefore, relevant rules must be formulated, called Bus protocols. Bus protocols generally include signal line definitions, data formats, time series relationships, signal power levels, and control logic.

2. I/O interface addressing

(1 ). Unified with memory unit addressing:

The registers or storage components related to the I/O interface are considered as memory units, which are uniformly configured with the storage units in the primary storage. In this way, the memory addresses and interface addresses are unified in a public address space.

(2 ). The I/O interface is independently edited. By setting a separate I/O address space to allocate address codes for registers or storage components in the interface, you need to use dedicated IO commands for access, the advantage of this addressing method is that it does not occupy the address space of the primary storage. The commands for accessing the primary storage are different from those for accessing interfaces.

4. data exchange between the CPU and peripherals

1) Direct Program Control

The main feature of direct program control is that the CPU directly accesses the IO Interface through IO commands, and each step of information exchange between the host and peripherals is displayed in the program, the entire input/output process is completed by the CPU execution program. The specific implementation is divided into two methods:

(1 ). Immediate program transfer method. In this way, the I/O interface is always prepared to receive information from the host, or to input data to the host at any time. The CPU does not need to check the interface status, and then runs the input and output commands for data transmission, this transfer method is also called unconditional transfer or synchronous transfer.

(2 ). Program query method. By executing a program, the Cpu queries the status of the peripherals to determine whether the peripherals are ready to receive data or are ready to input data to the CPU.

Advantages of the program query method: simple and easy to implement, reduces the CPU utilization, and consumes a lot of CPU time on the status of the query peripherals, making it impossible for external emergencies

Real-time response.

2) interrupt mode

Interruption is an important concept in computers.

Definition: In the process of executing a program on the CPU, the CPU temporarily suspends the program being executed due to an external or internal CPU event, and forwards it to process the event, after the event is processed, the system returns to the previously aborted program and continues the process before the event is aborted.

This process is called interruption.

(2 ). Data transmission in interrupted Mode

When the I/O interface is ready to receive data or is ready to transmit data to the CPU, it sends an interrupt signal to the CPU. After confirming the interrupt signal, the CPU saves the on-site execution of the program, instead, execute the previously set IO interrupt service program. Although the interrupt method can improve CPU utilization and handle random events and real-time tasks, the process of one interrupt must go through the stages of storage, interrupt processing, and recovery, several commands need to be executed to handle the interrupt event. Therefore, this method cannot meet the adjusted batch data requirements, so the DMA method is introduced.

3) Direct Storage Access

The basic idea of Direct Memory Access is to implement direct data transmission between the primary storage and I/O devices through hardware control. The data transmission process is controlled by the DMA controller without CPU intervention, in DMA mode, the CPU starts the transfer process, that is, each device sends a "transfer a piece of data" command. At the end of the transfer process, DMAC notifies the CPU for some subsequent processing by means of interruption.

4) channel control mode

A channel is a dedicated controller that manages IO operations by executing channel programs,

A data transmission channel is provided for hosts and IO devices. programs compiled using channel commands are stored in the memory. When IO operations are required, the CPU only needs to prepare commands and data in the agreed format, and then start the channel.