bootloader function Introduction/clock initialization settings/serial port working principle/memory Working principle/nandflash working principle

bootloader Function Introduction

Initialize the main hardware on the board (clock, memory, hard disk), copy the operating system from the hard disk to memory, and then let the CPU jump into memory to perform the operating system.

Boot Stage 1. Turn off peripherals that affect normal CPU execution-Turn off the watchdog (watch Dog)Wtcon 0xe2700000-Shutdown interrupt The CPSR I and F bits are set to 1, close, and do not respond to any interrupts. 2. Initializing the Clock-Octave to 1Ghz, for peripheral crossover * Serial Drive
3. Initialize the memory controller, Ddram-Verify memory, write a value to it, and then read it 4. Initializing the hard drive, NAND Flash-nand Flash read driver (read data from NAND)
Loader Stage 1. Load kernel to memory specified address from the address specified by the hard drive. 2. Jump to the address where the memory kernel is located, execute
Additional features: Implement Bootloader in Shell (command interpreter)
Additional features: Implement Bootloader in Shell (command interpreter)
Uboot support commands, helploadb download program, Kermit protocol Go 0x21000000;
Example: direct control of the buzzer in uboot mm 0xe02000a0 0x1 (Control Register) mm 0XE02000A4 0x1 (data register)
Common debugging means: 1.led lighting Dafa 2. Serial debugging, Uart_getchar,uart_putchar, further realize stdio.h

Clock initialization settings

PLL phase-locked loop, frequency multiplier

Serial Port Working principle

Core diagram of serial port work

#define ULCON0 * ((volatile unsigned int *) 0xe2900000)
The volatile keyword, which prevents the compiler from doing optimizations, reads the register every time the value of the register is read.

Start.sarea Start_main,code, Readonlyentryimport UART_TESTSTARTB uart_testend//uart.c#define ULCON0 * (volatile unsigned int *) 0xe2900000) #define UCON0 * ((volatile unsigned int *) 0xe2900004) #define UTRSTAT0 * ((volatile unsigned int *) 0XE2900010) #define UTXH0 * ((volatile unsigned int *) 0xe2900020) #define URXH0 * ((volatile unsigned int *) 0xe2900024) # Define UBRDIV0 * ((volatile unsigned int *) 0xe2900028) #define UDIVSLOT0 * ((volatile unsigned int *) 0xe290002c) #define GPAC ON0 * ((volatile unsigned int *) 0xe0200000) void Uart_init (void) {////serial PIN SET success Mode GPACON0 = 0x22;//Set 8 N 1ulcon0 = 0x3;//Set Polling work Mode UCON0 = 0x5;//set baud rate UBRDIV0 = 34; UDIVSLOT0 = 0XDDDD;} Char Uart_getchar (void) {char ch;//if there is data arriving, the status register No. 0 position 1//Determines whether the status bit is 1, decides to read the receive buffer register, reads the value as the function's return value while (! UTRSTAT0 & 0x1); ch = Urxh0;return ch;} void Uart_putchar (char ch) {///If the status register 1th is set to 1, indicating that the sending unit is empty, can send data//To send the CH value to the transmit buffer register, the status register 1th is set 0, automatically sent, when sent over while (!) ( UTRSTAT0 & 0X2)); UTXH0 = ch;} void Uart_test (void) {char ch;uart_init (); Uart_putchar (' a '); Uart_putchar (' B'); Uart_putchar (' C ');//serial echo function while (1) {ch = Uart_getchar (); Uart_putchar (ch);}} 

How Memory Works

--------------------------------------------------

Nandflash Working principle

Memory is a bus device and Nandflash belongs to a non-bus device.

No address lines, only data lines. Memory: Bus data, Nandflash: non-bus device. command, address, data multiplexing port. Free-busy bit.

#define NFCONF (* (volatile unsigned int *) 0xb0e00000) #define NFCONT (* (volatile unsigned int *) 0xb0e00004) #define NFCMMD ( * (volatile unsigned int *) 0xb0e00008) #define NFADDR (* (volatile unsigned int *) 0xb0e0000c) #define NFDATA (* (Volatile unsi gned int *) 0xb0e00010) #define NFSTAT (* (volatile unsigned int *) 0xb0e00028) #define MP0_3CON (* (volatile unsigned int *) 0xE 0200320) #define Page_size2048void nand_init (void) {//[15:12]tacls = 1-> (1) 1/133mhz = 7.5ns//[11:8] TWRPH0 = 1-> (1 + 7) 7.5ns*2 = 15ns//[7:4] TWRPH1 = 1-> (7.5ms) * = 15nsNFCONF |= 1<<2 | 1<< 8 | 1<< 4;//adrcycle [1]1=5 address cyclenfconf |= 1<<1;//mode [0] NAND Flash Controller operating node//0=DISABL e NAND Flash controller//* * = enable NAND flash Controllernfcont |= 1<<0;//reg_nce0 [1] nandflash memort nrcs[0] Si Gnal control//*0 = Force nrcs[0 [enable chip Select]//1 = Force nrcs[0] to high (disable chip select) Nfcont &amp ; = ~ (1<<1);//gpio functional MUX Setting//0010 = Nf_xxxmp0_3con = 0x22222222;return;}  void nand_read_id (char id[]) {int i;//write read_id cmd 90thNFCMMD = 0x90;//write Address 00hNFADDR = 0x00;for (i=0; i<5; i++) {Id[i] = Nfdata;} return;} void nand_read_page (int addr, char buf[]) {int I;char tmp;//write read_page cmd 00hNFCMMD = 0x00;//write 5 addressnfaddr = (addr >> 0) & 0xFF; nfaddr = (addr >> 8) & 0x7; nfaddr = (addr >> one) & 0xFF; nfaddr = (addr >>) & 0xFF; nfaddr = (addr >>) & 0x1;//write read_page cmd 30hNFCMMD = 0x30;//wait for R/nb-->readywhile ((Nfstat &am p; (1<<0)) ==0)//read data 2048 bytesfor (i=0; i<page_size; i++) {buf[i] = Nfdata;} for (i=0; i<64; i++) {tmp = Nfdata;} return;} void Nand_read (int nand_addr, char *sdram_addr, int size) {int pages = (size-1)/page_size + 1;int i;for (i=0; i<pages; i++) {nand_read_page (nand_addr + i*page_size, sdram_addr + i*page_size);}}

bootloader function Introduction/clock initialization settings/serial port working principle/memory Working principle/nandflash working principle