1. The computer is a large virtualization system, the CPU can only process one program at a time (process)
2. The operating system virtualized the CPU to appear to process multiple processes at the same time
3. The system needs power-on self-check post, start the computer's bootstrap ability (is the use of BIOS implementation bootstrap)
4. program = instruction + data. Instructions and data must be loaded into memory to enable its functionality
5. Architecture of the computer (the father of von Novo's computer system):
Arithmetic (data/control Bus): Generally only add operations, logic operations (minus, multiply, except all can be converted into addition and logical operations), responsible for the operation
Adder: Contains Addend, summand, output and; an adder can only operate an addition operation, with a 2-binary operation (circuit closure to control, closed with the current is understood as the logical operation of 1, disconnection is the logical operation of 0)
Register : In the case of line multiplexing, there is a device that temporarily registers the addend in the operator
controller (Control Bus): Together with the above operators to form a CPU, responsible for controlling where to fetch data
Memory (memory) (data bus): is a addressable storage device, each byte 8 bits, has a globally unique address (flat address), responsible for storing data and instructions
RAM: Random volatile memory
ROM: Read-only memory, automatically mapped at the front of the memory when the boot, used to detect all devices of the power-on self-test
Output device: More user interaction, auxiliary computer operation, such as hard disk, network card
Input device: more user interaction, auxiliary computer operation, such as hard disk, keyboard, mouse, network card
1: In many IO devices, how does the CPU know which input device is coming in? How do you know which output device to send?
A: There is a terminal control chip near the CPU, directly connected to the CPU, the chip with different lines with different inputs and outputs, the perception of different link signals, the direct report to the CPU, so that the CPU is aware of the different input and output devices
What is the frequency of thinking about 2:CPU?
A: When the adder is in operation, each time the frequency is able to complete an event, such as Addend, summand, output and
Think 3: What is a South bridge device? What is North Bridge equipment?
A: North bridge equipment is near the CPU device, is a high-speed bus controller, used to control all data and CPU interaction
The South bridge device is a low-speed bus controller, used to control the input and other IO devices, summarized after the connection to the North bridges to the CPU
Think 4: What is a first-level cache? Second-level cache?
A: When the CPU frequency operation is higher than the memory data reading speed, need a cache data technology, this is the cache. So the computer's high frequency, also can not explain the speed of the computer, but also to see the speed of memory. Caching is a measure of the performance of a computer, and the average cache is expensive.
Thinking 5: What is the local principle of the program?
A: The program follows the principle of locality, and the locality is divided into the local nature of time and the locality of space.
Locality of Time: The program may be accessed again at other times
Spatial locality: Data surrounding the program may also be accessed. All programs must rely on the chip to work.
5. The program is the composition of instructions and data, to allow the machine to read the program, the program must be written in binary, such a program is called machine language (too difficult); later chip manufacturers, the chip language is accompanied by microcode, each chip support microcode programming, such programming is called Assembly language, Assembly language must be compiled into a computer can read the language (machine language), so need a compiler (also a software), but different chip manufacturers of the microcode is not the same, so the general Inter of the Chip assembly language is not used in the Motorola chip, so the assembly language is heavily dependent on the hardware chip, This is what we call a low-level language. Later appeared in our high-level language, no matter what kind of high-level language, are doing based on different hardware chips of the same program development environment, in fact, is to use assembly language to write a virtual same environment API interface, transparent the underlying hardware, the API can be used in the upper layer of different high-level language Program compilation, No need to consider the difference between the underlying hardware.
How does the CPU handle multiple programs at the same time? The concept of operating system processes has occurred
CPU time slice (slice): Assume 5ms
Fragmentation mechanism of memory, virtual address space
Operating System definition: is a kind of management hardware resources, control the CPU time slices and memory segmentation and other software assigned to different programs, complete the process of starting, terminating, switching and other operations. is a generic software that is not responsible for specific work and is responsible for coordinating other procedures. With the operating system, all programs (processes) do not work directly with the hardware and need to interact with the underlying by operating system kernel calls. Since kernel calls are too low-level, they are made into a variety of interfaces relative to the upper layer, so that many of the upper-level interfaces are called operating system libraries. C language Writing programs are compiled using different libraries to compile. In other words, the program developed on window is developed through the library of Windows, and Linux is developed using Linux libraries. (The underlying hardware----the operating system----Library----The upper-level program software). For the human machine to be able to interact more effectively, you need a technical--shell
6. Hardware architecture (different series of CPU chips)
ARM: Mobile CPU Architecture (Android, IOS), power saving, good performance
X86:inter or AMD CPU architecture (32-bit, 64-bit)
Itanium: belongs to Inter, acquired from Hewlett-Packard
Alpha: HP's CPU
Ultrasparc:san, the San now belongs to Oricle.
Power: The first single-core CPU with a frequency of more than 4G CPU,IBM
m68k: Motorola CPU
PowerPC: It was developed by Apple, IBM, and Moto.
7.OS Introduction
Windows
Linux
Unix
HP-UX
Solaris
SCO UNIX
UnixWare
Os/2
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Brief analysis on the principle of computer (I.)