Brief discussion on interrupt register and interrupt process of s3c2440

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Original address: http://blog.csdn.net/ce123/article/details/6940349
Description: Briefly discusses the interrupt register and the interrupt process of s3c2440.

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brief discussion on interrupt register and interrupt process of s3c2440S3C2440 altogether has 60 interrupt sources, including 15 sub-interrupt sources, which correspond to each bit in the SUBSRCPND register, and the other 45 interrupt sources correspond to each bit in the SRCPND. Note that the eint4~7 corresponds to the same srcpnd[4], and eint8~23 corresponds to srcpnd[5].
Interrupt Register for 1 s3c2440Interrupts are divided into two main categories: external interrupts and internal interrupts.
1.1 External interrupt registers24 external interrupts Occupy Gpf0-gpf7 (EINT0-EINT7), Gpg0-gpg15 (eint8-eint23). With these feet to do the interrupt input, the PIN must be configured for interrupts, and do not pull up. Refer to the Datesheet data sheet for details.
Register:
Extint0-extint2: Set the trigger mode of EINT0-EINT7, eint8-eint15, eint16-eint23 respectively (High level trigger, low level trigger, falling edge trigger, rising edge trigger).
EINTFLT0-EINTFLT3: Controls the filter clock and filter width.
Eintpend: This is an interrupt suspend register, to write 1 when cleared, and a few to write 1 to clear. When an external interrupt (eint4-eint23) occurs, the corresponding bit is set to 1. Why there is no eint0-eint3 because they are controlled by the latter 4 bits of the SRCPND register, respectively.
Eintmask: This is a simple, blocking interrupt, that is, the bit is 1 o'clock, this interrupt is invalid.
1.2 Internal Interrupt RegisterInternal interrupts have 8 registers. Register:
SUBSRCPND: When an interrupt occurs, the corresponding bit is set to 1, indicating that an interrupt has occurred.
Intsubmsk: The same as the previous one, interrupts the masking register.
SRCPND: When an interrupt occurs, the corresponding bit is set to 1, indicating that one or a class of interrupts have occurred.
Intmsk: Used to mask interrupts identified by the SRCPND register. However, only IRQ interrupts can be masked and Fiq interrupts cannot be masked.
Intmod: When a bit in Intmod is set to 1 o'clock, its corresponding interrupt is set to FIQ,CPU to enter fast interrupt mode.
Priority: Used to prioritize IRQ interrupts. Refer to the chip manual for specific use.
INTPND: Interrupt priority arbiter after the highest priority interrupt is selected, the corresponding bit in the INTPND register is set to 1, and then the CPU goes into interrupt mode to process it. At the same time, only one of the registers is placed 1.
Intoffset: Used to indicate which bit in the INTPND register is set 1, that is, the value of the bit x that records INTPND in bits [x] is 1. Clear INTPND, SRCPND automatically when cleared.
1.3 Each register relationship:

Figure 1 The relationship between the interrupt registers2 Interrupt Process 2.1 Internal Interrupt processA if it is not a tape interrupt internal interrupt: After the occurrence of srcpnd corresponding position 1, if not shielded by Intmsk, then wait for further processing.
b If the tape interrupted internal interrupt: After the occurrence of subsrcpnd corresponding position 1, if not Intsubmsk shielding, then srcpnd corresponding position 1, waiting for further processing, several SUBSRCPND may correspond to the same SRCPND, the corresponding table is as follows:


2.2 External Interrupt processA if it is an external interrupt: Eint0-eint3 occurs after the srcpnd corresponding position 1, if not blocked by Intmsk, then wait for further processing. eint4-eint23 occurs after eintpend corresponding position 1, if not eintmask shielding, then srcpnd corresponding bit eint4-7 or eint8-23 1, if not been Intmsk shielding, waiting for further processing, Several eintpend correspond to the same SRCPND, the corresponding table is as follows:



Three interrupts are waiting for further processing. Next, look down from SRCPND and see Intmsk. If the interrupt is blocked, it goes without saying (note: A fast interrupt can also be blocked). If it is not masked, it will go further to Intmod. If it is a fast interrupt, then go straight out and enter Fiq (that is, the CPU goes into fast interrupt mode processing). If it is a normal interrupt, then SRCPND can have more than 1 (Fiq can only have one), then will be selected by the priority of a high precedence, and then the selected interrupt to the INTPND corresponding position 1 (note: can only select one), into the IRQ, let the CPU processing.
2.3 Opening of interruptsA. If the internal interrupt is not interrupted by the tape, simply set the Intmsk so that it does not block the interrupt.
b if it is an internal interrupt for the tape interrupt, set the Intsubmsk and Intmsk so that they do not block the interrupt.
c if it is an external interrupt, you need to set Eintmask and Intmsk for eint8-23. For Eint0-eint3 just set Intmsk.
2.4 Removal of interruptsA. If the internal interrupt is not interrupted by the tape, simply clear the SRCPND and note that the removal requires position 1.
b if it is an internal interruption of the tape interruption, remove the SRCPND and SUBSRCPND, notice that the SUBSRCPND is cleared first, and then the SRCPND is cleared. Because, if you clear SRCPND first, then in the process of clearing SUBSRCPND, SRCPND will think that there is an interruption, and will set 1. This means that one interrupt will respond two times. So the source must be cut off first.
c if it is an external interrupt, the Eintpend and SRCPND (same note order) need to be cleared for eint8-23. For Eint0-eint3 just clear SRCPND.