Standard bt.656 Parallel Data Structure
In addition to YCbCr video data streams at, the bt.656 parallel interface also provides control signals for row and column synchronization ., A frame of image data consists of a data block of 625 rows and 1 728 bytes per line. Among them, 23 ~ The fifth row is an even number of video data fields. The value ranges from 311 to 336 ~ The fifth line is the odd video data, and the rest is the vertical control signal.
Each row of data includes a horizontal control signal and YCbCr. Video data signal. The video data signal is arranged in CB-y-Cr-y order. The first 288 bytes of each line are the row control signal, and the first 4 bytes are the EAV signal (the end of the valid video), followed by 280 fixed data pads, the last is the 4-byte sav signal (effective video start ).
The SAV and EAV signals have a three-byte leading: FF, ff, and 00. The last one-byte XY indicates the location of the row in the entire data frame and how to distinguish Sav and EAV. The meanings of each XY byte bit are shown in figure 5.
The highest bit7 value is fixed data 1; F = 0 indicates an even number of fields; F = 1 indicates an odd number of fields; V = 0 indicates the behavior of valid video data, V = 1 indicates that the row does not have valid video data. h = 0 indicates the SAV signal, H = 1 indicates the EAV signal, and P3 ~ P0 is the protection signal, which is calculated and generated by F, V, and H. P3 = V or H; P2 = f or H; P1 = f or V; p0 = f or V or H.
Transmit the data structure of a 4-channel CIF video using the bt.656 parallel interface
The output of the video processor is flexible and changeable. It can change the output data structure of the processor to transmit 4 channels of video signals of 252x288 pixels at the same time. The effective video data streams transmitted by the bt.656 parallel interface are 720 × 586, which can be divided into 4 360 × 288 pixels to transmit 4 channels of 352 × 288 pixels of video data. The excess space is filled with "8010" of the fixed data.