Cainiao compilation 003 code segment register CS and instruction pointer register IP

1. The 8086cpu has a 20-bit address bus that can transmit 20-bit addresses to achieve 1 MB addressing capability.

The 8086cpu is a 16-bit structure, and the addresses for internal one-time processing, transmission, and temporary storage are all 16 bits,

According to the internal structure, the addressing capability is only 64 KB.

 

What should we do?The 8086cpu uses two 16-bit addresses to synthesize a 20-bit physical address.

 

2. There are four segment registers: CS, DS, SS, and es. Let's first look at learningCode segment register CS
.

 

3. segment address (16 bits) + offset address (16 bits) ----> send it to "address divider", which is a 20-bit physical address.

 

Physical address = segment address x 16 + offset address

 

For example, the 8086cpu needs to access the memory unit of 123c8h.

 

The CIDR block address is 1230 h, and the offset address is 00c8h.

The address divider first changes the segment address x16 to 12300 H.

Then perform addition operations in primary school.

12300 H

+

00c8h

-----------------

123c8h

 

4. segment address x16, which can be understood as four shifts left,If an X-in-one data is shifted to the left, the original data is multiplied by X.

 

5. segment address x16 + offset address = essential meaning of physical address

When the CPU accesses the memory, it adds a base address (segment address x16) and an offset address relative to the base address to give the physical address of the memory unit.

 

6. The CPU can use different segment addresses and offset addresses to form the same physical address.

 

7. If a segment address is specified, it can be addressed only by changing the offset address. A maximum of 64 kB memory units can be located.

 

8. On the 8086pc server, the address of the storage unit is described in two elements, segment address and offset address.

 

9. CS segment registers (CS, DS, SS, ES)

CS and IP are the two most critical registers in the 8086cpu. They indicate the address of the command to be read.

CS is the code segment register




(Code segment register)

The IP address is the instruction pointer register.




(Instruction Pointer register)

.

On the 8086pc server, set the CS content to m at any time, and the IP content to N,

The 8086cpu starts from memory m x 16 + N Units, reads and executes a command.

 

10. Modify the commands for CS and IP addresses.

 

Most 8086cpu registers can be changed using mov commands. mov commands are calledTransfer command

The mov command cannot modify the Cs or IP value because 8086cpu does not provide such a function.

 

Commands that can change the content of CS and IP registers are calledTransfer Instruction

.

 

A simplest command that can modify the value of CS and IP registers: JMP command.

 

(1) If you only want to modify the content of the IP register, the syntax is as follows:

A valid register of JMP ----> use the content in (a valid) Register to modify the value in the IP register.

 

Example: Assume that AX = 1000 h, cs = 2000 h, IP = 0003 H

After JMP ax is executed, Ax = 1000 h, cs = 2000 h, IP = 1000 h

 

(2) If you want to modify the Cs: IP address register value at the same time. Syntax: JMP segment address: Offset address

 

For example, after JMP 2ae3: 3 is executed, cs = 2ae3h, IP = 0003 H. The CPU reads the command from 2ae33h.

 

11.Code segment: A group of codes with a length of n (n <= 64kb) can be included in a group of memory units with a sequential address and a starting address multiple of 16,

We can think that this section of memory is used to store code and thus define a code segment.

 

If you want the CPU to execute commands in the code segment, you must point the Cs: IP address to the first address of the first command in the defined code segment.

 

Example: The following code segment (10 bytes in length)

MoV ax, 0000 h (B8 00)

Add ax, 0123 H (05 23 01)

MoV BX, ax (8B D8)

JMP Bx (FF E3)

 

If you store the above code snippet in 123b0h ~ In a memory unit of 123b9h, it is defined as a code segment,

To run this code, set CS to 123bh and IP to 0000 h.

 

12. 8086cpu operation process:

(1) read the instruction from the memory unit of the CS: IP instruction, and the read instruction enters the instruction buffer.

(2) IP pointing to the next instruction

(3) execute the command [Repeat Step (1) and repeat the process]