Each capture/compare channel is centered around a capture/compare register (including the shadow register), including the captured input (digital filtering, multiplexing, and pre-divider ), and the output part (comparator and output control ). The capture/compare module consists of a preload register and a shadow register. Only the pre-loaded registers are operated during the read/write process. In the capture mode, the capture occurs in the shadow register and then copied to the pre-loaded register. In comparison mode, the content of the pre-loaded register is copied to the Shadow register, and then the content of the Shadow register is compared with the counter.
(Does the comparison reach the preset value ?) PWM mode. In addition to tim6 and tim7, other timers of stm32 can be used to generate PWM output. Among them, advanced timers tim1 and tim8 can generate 7-way PWM output simultaneously, the general timer can also generate 4-way PWM output at the same time. The pulse width modulation mode can generate a signal that is determined by the timx_arr register frequency and determined by the timx_ccrx register duty cycle. Ocxm in the timx_ccmrx register
Bit write '000000' (PWM mode 1) or '000000' (PWM mode 2), able to independently set each OCX output channel to generate one channel of PWM. In PWM mode (mode 1 or Mode 2), timx_cnt and timx_ccrx are always compared (based on the counter Counter Direction) to determine whether timx_ccrx is less than or equal to timx_cnt or timx_cnt is less than or equal to timx_ccrx. PWM is the abbreviation of pulse width modulation. It is a very effective technology that uses the digital output of a microprocessor to control analog circuits. It is widely used in many fields such as measurement, communication, power control and transformation. PWM is a digital coding method for analog signal levels. Through the use of high-resolution counters, the duty cycle of the square wave is modulated to encode the level of a specific analog signal. The PWM signal is still numerical, because at any given moment, the DC power supply at Full amplitude is either completely on or off ). A voltage or current source is added to a simulated load using a repeating pulse sequence of on or off. When the DC power supply is added to the load, when the power supply is disconnected. If the bandwidth is sufficient, any analog value can be encoded using PWM. Most loads (either inductive or capacitive) require a modulation frequency higher than 10Hz. The modulation frequency is usually between 1 kHz and kHz. ----------------------------------------------------------------------------
1.2 The output pin of the PWM output pin is determined. For specific pin functions, see section 8.3.7 "re ing of timer reuse function" in stm32 reference manual. It should be emphasized that different timx pins are allocated, but considering the pin reuse function, stm32 proposes a concept of re-imaging, that is, by setting some related registers, to output PWM on other non-original pins. However, the pins of these images are also provided in the reference manual. For example, in the tim3 2nd channel, when there is no re-image, the specified pin is pa.7. If some re-images are set, the output of tim3_ch2 is mapped to pb.5, if a full re-image is set, the output of tim3_ch2 is mapped to pc.7. 1.3 PWM output signal PWM outputs a square wave signal. The signal frequency is determined by the timx clock frequency and the timx_arr pre-divider, the specific setting method is described in detail in the previous study note. The duty cycle of the output signal is determined by the timx_crrx register. The formula is "duty cycle = (timx_crrx/timx_arr) * 100%". Therefore, you can enter a proper number in the CRR to output the square wave signal of the desired frequency and duty cycle. 2. Step 1 of timer output PWM implementation. Set the RCC clock; 2. Set the gpio clock; 3. Set the related registers of the timx timer; 4. Set the PWM related registers of the timx timer. The detailed code for setting the RCC clock in step 1 has been provided in the previous article. Note that the universal timer timx is provided by apb1, while the gpio is provided by apb2. Note: If you need to re-map the PWM output, you also need to enable pin multiplexing clock afio. When you set the gpio clock in step 2, The gpio mode should be set to reuse the push-pull output gpio_mode_af_pp. If you need to reset the pin, you need to use the gpio_pinremapconfig () function. When you set the related registers of the timx timer in step 2, set the related timx clock and technical mode like the previous study notes. For more information about the settings, see the "timer basic timing function" study notes. To set the PWM registers in step 1, you must first set the PWM mode (by default, the PWM is frozen), then set the duty cycle (calculated based on the formula described above), and then set the output to compare polarity: when it is set to high, the output signal is not reversed. When it is set to low, the output signal is reversed before being output. The most important thing is to enable the timx output status and the timx PWM output. After the related settings are complete, you can enable the timx timer through tim_cmd () to obtain the PWM output. 3. Timer outputs the source code of PWM. Because I am working on the Development Board to connect pb.5 TO THE led, we need to use the CH2 channel of tim3 and perform pin re-imaging. After tim3 is enabled, the PWM output enables the led to light up. The brightness of the LED can be adjusted by changing the duty cycle in pwm_cfg. # Include "stm32f10x_lib.h" Void rcc_cfg (); void gpio_cfg (); void timer_cfg (); void pwm_cfg (); // duty cycle; value range: 0-100int dutyfactor = 50; int main () {int temp; rcc_cfg (); gpio_cfg (); timer_cfg (); pwm_cfg (); // enable tim3 timer, start to output PWM tim_cmd (tim3, enable); While (1);} void rcc_cfg () {// defines the error state variable errorstatus hsestartupstatus; // reset the RCC register to the default value rcc_deinit (); // enable the external high-speed clock crystal oscillator rcc_hseconfig (rcc_hse_on); // wait for the external high-speed clock crystal oscillator to work hsesta Rtupstatus = rcc_waitforhsestartup (); If (hsestartupstatus = success) {// set AHB clock (hclk) to rcc_hclkconfig (clock); // set high-speed AHB clock (apb2) set the hclk clock rcc_pclk2config (latency); // set the low-speed AHB clock (apb1) to the 2-division rcc_pclk1config (latency) of the hclk; // set the flash code latency flash_setlatency (flash_latency_2 ); // enable prefetch refers to the cache flash _prefetchbuffercmd (flash_prefetchbuffer_enable); // you can set the PLL clock to 8 MHz x 9 = 72 MHz rcc_pllco of HSE. Nfig (mirror, rcc_pllmul_9); // enable PLL rcc_pllcmd (enable); // wait for the PLL to be ready while (rcc_getflagstatus (rcc_flag_pllrdy) = reset ); // set the PLL as the system clock source rcc_sysclkconfig (rcc_sysclksource_pllclk); // determine whether the PLL is a system clock while (rcc_getsysclksource ()! = 0x08);} // enable the timer (enable) of tim3; // enable the clock and reuse function rcc_apb2periphclockcmd (rcc_apb2periph_gpiob | enabled, enable) of gpiob );} void gpio_cfg () {gpio_inittypedef gpio_initstructure; // some ing, map tim3_ch2 to pb5 // gpio_pinremapconfig (scheme, enable); gpio_pinremapconfig (scheme, enable ); // select pin 5 leading = gpio_pin_5; // output frequency up to 50 MHz leading = gpio_speed_50mhz; // reuse the push-pull output leading = gpio_mode_af_pp; gpio_init (gpiob, & gpio_initstructure );} void timer_cfg () {tim_timebaseinittypedef tim_timebasestructure; // set timer to the default tim_deinit (tim3); // provides tim_internalclockconfig (tim3) as the clock source for tim3 using an internal clock ); // The pre-division coefficient is 0, that is, no pre-division is performed. At this time, the timer frequency is 72 MHz tim_timebasestructure.tim_prescaler = 0; // you can specify tim_timebasestructure.tim_clockdivision = tim_ckd_div1; // sets the counter mode to the up-counting mode tim_timebasestructure.tim_countermode = tim_countermode_up; // sets the Count overflow size. An update event is generated for every 7200 counts, that is, the output frequency of PWM is 10 kHz leading = 7200-1; // apply the configuration to tim_timebaseinit (tim3, & tim_timebasestructure);} void pwm_cfg () {tim_ocinittypedef timocinitstructure; // set the default value tim_ocstructinit (& timocinitstructure); // output timocinitstructure in PWM mode 1. tim_ocmode = tim_ocmode_pwm1; // set the duty cycle. The duty cycle is (ccrx/ARR) * 100% or (tim_pulse/tim_period) * 100% timocinitstructure. tim_pulse = dutyfactor * 7200/100; // the output of Tim is more polar than that of timocinitstructure. tim_ocpolarity = tim_ocpolarity_high; // enable the output state timocinitstructure. tim_outputstate = tim_outputstate_enable; // CH2 output tim_oc2init (tim3, & timocinitstructure); // set the PWM output of tim3 to enable tim_ctrlpwmoutputs (tim3, enable );}
