Today, TPU took out a 2440 board for debugging, and found that despite various measures, USB host always does not work occasionally. the uclk is extracted through clkout0 and viewed with an oscilloscope. When it is found that it is not working, the uclk is not stable at all. therefore, there are several factors that affect USB:
- External oscillator 16.9344 MHz
- Upll locktime of the locktime register
- Upllcon
- Upll switch for clkslow registers
Next, exclude them one by one:
- The crystal oscillator is used by mpll and upll. It has never been said that mpll is unstable.
- It is suspected that the locktime is too large (0 xFFFF), but it cannot be changed.
- It is useless to repeatedly set upllcon when the uclk is unstable.
- When the uclk is unstable, switch the upll! When the uclk is stable, switching the upll will also lead to instability.
That is to say, when upll is started, synchronization may fail. But why? Upll and mpll should be of the same structure, and mpll will never be faulty. upll only has a lower frequency than mpll, so let's look at the frequency.
Now we have set a relatively low frequency (such as 7 MHz) for upllcon. At this time, no matter how upll is switched, uclk is always unstable. Well, sugon has already appeared! Then a super high frequency (112 MHz) is set. Haha, uclk is very stable no matter how upll is switched or powered on.
The problem can be described as follows:: Upll cannot be reliably started at low frequency.
Solution:First, a high frequency is provided for upll. After it is stable, set the required frequency..
Note: If you want to switch the upll switch in clkslow, follow this setting step.
After this change, the TPU switching power supply is more than one hundred times, and the uclk is always very stable. This is only 2440 of the situation, but it should also apply to 2410. You can test and verify it.