[CCD Image Detection] 2: Hardware Design for black/white image detection

CCDImage Detection<II>

Author: 1.1 drops of beer INSTRUCTOR: Chen Zheng; Unit: whu

 

Ii. Hardware Design for black/white image detection 

2.1Power supply. 

 

Figure6:CCOfD12vPower Source 

Because the battery voltage of the car is 7.2 V, and the working voltage of the CCD camera is 12 V, a Boost Circuit needs to be built using a chip, as shown in figure 6.

2.2Video signal field synchronization signal separation. 

 

Figure7: Video signal synchronization signal separation circuit 

Each video signal is composed of different lines. As shown in figure 5, there is a synchronous signal between the field and between the line and the line. The microcontroller captures these synchronous signals, to control the time sequence of image acquisition and ensure the correctness of image acquisition. The Video Signal Separation chip lm1881 can extract the synchronous pulse, hidden pulse and field synchronous pulse from the video signal, and convert them into digital signals to the I/O port of the single chip microcomputer. Video signal separation circuit 7.

2.3Line video signal digitization. 

Because the image signal collected by the analog camera is a analog signal, while the computer system is a discrete digital system, it must be converted to a digital signal before being delivered to the MCU for processing. The chip Xs series recommended by the competition Organizing Committee is integrated with 8 AD ports and has rich I/O interface resources. In addition, it also features the simplicity of the color composition of the Primary and Secondary vehicle tracks, video signal digitization solutions have become diversified. The car uses the analog CCD camera as the sensor, and the analog acquisition first references a video signal to Figure 2 circuit, through which the compound video signal output by the camera can be separated, obtain independent synchronous signals and video analog signals, and then complete the entire image acquisition through row-by-row sampling. The following describes three methods to digitize the line signal.

2.3.1InchipAdModule. 

Because xs128 itself contains eight channels of AD, you only need to introduce one channel of video signal to any ad port, and then initialize the ad port first on the software, then execute the following in the synchronous interrupt function:CodeTo complete digitization:

For (I = 0; I <column; I ++)

{

While (atd0stat0_scf! = 1); // The adswitch waits

* G_video -- = atd0dr0l; // register read

}

The advantage of this method is that no additional peripheral circuit design is required, and video signals are directly introduced. The gray-scale data of images can be obtained by using the AD conversion of xs128 in-chip resources. Xs128 can collect 96 points per line when the frequency reaches 64 mb. If the horizontal precision of the image is not high, this method is the easiest. However, if CCD looks far away, due to the geometric distortion of the image, there will be only one black spot in the final ad result of the remote black line, which leads to a high false positive rate during black line extraction, this method is no longer applicable.

  

2.3.2Based onTlc5510Of8Bit parallelAd. 

In order to get a higher sampling accuracy for each line of signal, we can consider using the/D Method on the premise that xs128 has redundant Io ports. Tcl5510 is an 8-bit parallel high-speed AD conversion chip. If an independent clock is used, its ad speed can reach 20 Msps, and then the digital signal is output through the 8-bit data bus, it is directly introduced to a set of I/O Ports of xs128. in the software design, you only need to read the I/O ports to obtain digital signals. Corresponding adconverter circuit 8.

Figure8: Off-creditsAdConversion Circuit 

When the chip reads the port, the clock synchronization is required to prevent the hop edges of the read to the AD conversion. xs128 contains eight PWM outputs, A pulse with a certain frequency can be output by turning one PWM to simulate a synchronous clock signal to the ad module outside the chip, which solves the clock synchronization problem more conveniently. In actual situations, when the xs128 frequency reaches 80 m, each line can collect 240 points, so that the black line disappears in the distance.

In addition to the high sampling accuracy, more importantly, this method stores the gray information, which can greatly prevent the loss of image information, but the peripheral circuit is complicated, it also occupies a large amount of I/O port resources (xs128 is required to provide an additional set of 8-bit I/O Ports for Digital Signal reading ).

If there are many collection points, it is a disaster for xs128, where Ram resources are not rich.

 

2.3.3Hardware binary value based on voltage comparator. 

The above two methods finally obtain the gray-scale data of the image, which can reflect the scenes seen by CCD more realistically. However, in the competition, the track only consists of black and white colors (9), so even gray-scale data, during the final processing, we usually need to perform binarization on the software to divide the image into black and white two-color images. Therefore, we can directly use hardware for image binarization, convert video signals into a set of square wave signals, and then directly input them to an I/O port, read the port of this bit. The high level indicates 1, and the low level indicates 0.

2.3.3. 1Hardware binary Circuit 

There are two ways to separate Grayscale Images in the software:

Fixed threshold method, that is, the voltage above this threshold, that is, 1, otherwise 0, and then black line edge detection through software.

The edge hop method is used to detect the black line edge. When the gray value difference between two adjacent points is fixed, the black line edge is detected.

The above two methods can be achieved through the voltage comparator circuit. 10 and 11 respectively.

Figure9: Smart Car Track Color Composition 

Figure10: Fixed reference voltage two-value Circuit 

Figure11: Two-value circuit for Edge Detection 

The design of a Two-value circuit with fixed reference voltage is relatively simple, and it is also convenient to adjust the voltage junction of the reference threshold value-you only need to compress a potentiometer resistance value (to add an LCD for the system, images can be acquired directly after the potentiometer is adjusted), so it has a certain degree of adaptability to the site. However, in actual use, we found that the fixed reference voltage of the Two-value circuit in the CCD field of view is relatively far, there will still be image segmentation phenomenon, this method is no longer applicable, therefore, we can consider using a two-value circuit for edge detection. In the two-value edge detection circuit, the original video signal and the lagging video signal are input to the two ends of the voltage comparator. When the video signal jumps to the edge, the amplitude difference (12) is generated in two inputs ), then, when the amplitude difference reaches a certain level (controlled by the lagging back circuit), the output end of the voltage comparator switches over and outputs the video signal in the form of a square wave (13, note: the first low-level area is the row synchronization area, and the second is the black line area ).

 

Figure 12. original video signal (green) And lagging processing video signal (yellow)

Figure 13. original video signal (green) And the output square wave signal (yellow)

 

 

 

2.3.3. 2The tuning of component parameters in the circuit. 

First, we understand the time constants of general RC circuits, as stated below:

Figure14: CommonRCCircuit 

The relationship between the output voltage at both ends of the capacitor and the power supply voltage is as follows:

The relationship between the voltage increase amplitude and the increase time (lagging time) is as follows:

T (/RC)	1	2	3	4	5
UC/us	0.632	0.865	0.95	0.98	0.993

Table 1: lagging schedules

The black line video signal time is 3 ~ 4 μs (R2 = 1.3 K)

Figure15: Video signal generated by the central black line of the track

Generally, to obtain the maximum voltage difference between the two sets of video signals at the same time point, it is required that the lagging signal be as lagging as possible. But it cannot be too lagging. For example: (R2 = 6.4 K)

Figure16: WhenR2Large lagging output signal 

The following figure shows the video signal output for different lagging resistors:

 

1/3G lag Resistance

3 K lag Resistance

6.4 lag Resistance

 

Figure17: Output Waveform of the circuit under different lagging Resistors 

Then we calculate a reference value of roughly R2.

We require that in the black line area, the lagging Signal Time is exactly the time of a black line video signal, that is, about 3 ~ 4 μs to ensure that the Valley has reached before the next rising edge to ensure the voltage difference of the rising edge.

For example, in table 1, about t = 3 ~ 5 times RC, we can think that the voltage has reached the maximum value. Therefore, the latency video signal must be at T0 = 3 ~ The maximum value can be reached within the five RC, while t0 <3 ~ 4 μs. Roughly calculate:

3*10-6 = 4 * R2 * 510*10-12

After obtaining the R2 = 1.47 K, the voltage reaches 0.98 of the original hop point after 3 μs.

The obtained r2 = 1.96 K voltage reaches 0.98 of the original hop point after 4 μs (just the width of a near-black-line video signal ).

Therefore, generally, R2 takes a value. In practice, when the LCD is used together to adjust the R2 potentiometer, it is found that R2 = 1.85k has a good effect, which is in line with the theoretical calculation results.

The Method for Determining the R4 parameter. Reference: http://www.elecfans.com/article/90/150/2009/2009050756701.html

Figure18: Hysteresis Voltage ComparatorI/OVoltage chart 

Lagging back voltage (VL) = R4/(R4 + R5) * (vo_max-vo_min)

Because the black line edge produces around 400mV hops (easily visible on the oscilloscope ),

Therefore, the hysteresis voltage is 400mV -.

In the experiment, we set R4 to 4.5 K to produce 215mV of the hysteresis voltage. On the one hand, it can be better for interference, on the other hand, it will not make the black line too small.

2.3.3. 3Hardware binary features.

Edge detection circuit is used. by adjusting the size of the two potentiometer, it can adapt to the light of different game venues and adapt to the different field views of CCD. It has a strong image segmentation capability, better site adaptability. Compared with AD, this solution has the following advantages:

1. Simpler circuit design.

2. Only one chip IO port is occupied, which is 1/8 of the off-chip AD.

3. Do not consider clock synchronization.

4. the horizontal precision can be regarded as infinite (because the level signal is directly input and read by a single port of the MCU). When the requirements are met, the MCU does not need to overclock or even need to divide the frequency, the 8 M frequency read port can collect more than 120 points per line, so there is no Black Line Disconnection when the field of view is far away.

5. The hardware binary value is used to directly divide the image correctly and effectively, reducing the amount of CPU computing and increasing the segmentation reliability.

Obviously, because of the above advantages, the hardware dual-value detection solution has a great advantage for a simple track environment. However, the detection method of this solution also has limitations and has high accuracy for vertical black line detection. However, horizontal black line detection may be unstable when the vehicle is moving (that is, there is a problem with the detection method, there are also CCD problems, which are also related to the selection of sampling lines). The most obvious difference is the distinction between the cross line and the start line. When detecting the cross line, because the CCD camera installation method and the spherical lens itself have a certain degree of distortion, so that the cross line horizontal line is in the bow shape (in the distance is the outer bow and arrow shape, close to the inner bow and arrow shape)

 

 

Figure19: UseAdThe normal cross and start lines collected by the module

Figure20: Cross line detection problems

Figure21: Starting line detection problems

If the above conditions occur, the detection of the starting line becomes quite difficult (basically unable to detect normally): on the one hand, there is interference from the cross line, and on the other hand, the detection of the starting line is unstable. Therefore, to solve the startup line problem, we used ad to collect 10 lines near the line (because the line is near, so the line accuracy is not high, it can occupy less memory ), used separately as the basis for determining the start line.

2.3.3. 4Application Prospect of hardware binary value.

The biggest feature of the hardware binary value is that the analog TTL level signal is output, which is the level signal that the MCU can process and recognize, this provides a lot of room for development for hardware image processing. The main problems of image acquisition are precision and fidelity. The fidelity is related to the collection method, while the improvement in accuracy is largely restricted by the chip RAM resources. When the hardware binary value is used for collection, the image will inevitably cause certain distortion, but it can basically meet the needs of users. Therefore, we can look forward to improving the collection accuracy. When the camera has a wide field of view, if the sampling row is sparse, it will cause a large amount of data loss. In severe cases, the black guide lines in the same image may even be discontinuous, this is extremely unfavorable for black line extraction. The following describes two methods to improve the accuracy: The hardware layer and the software layer for your reference.

Hardware:

(1) the video signal after the hardware binary value is directly entered into the single-chip microcomputer input capture module, and the hardware is used to extract some information we care about, then we can analyze and compute the information that is useful to ourselves. On the one hand, the hardware handles part of the data processing for us, and on the other hand, the data used to record a line of video signals becomes very small, this is a good message for xs128 chips with high clock speed but low Ram, so that we can greatly improve the longitudinal precision of the collected images at a certain time in Ram.

Capture the video output of the differential circuit by using the HCS12 single-chip microcomputer. When the hop is detected, the current tcnt is recorded and stored in an array. Obviously, in this way, up to 10 of the ideal Smart car tracks are like the following (and may be very small-three tracks are parallel, and there is no starting line, and the CCD's angle of view shot them all ).

Figure22: Limit of ideal track Environment

Figure23: Actual track Environment

In the actual track, on the one hand, there is normal black line interference from the cross track, and on the other hand there is interference from the light, especially at the edge of the track, there will be some messy interference signals, this is extremely unfavorable for the hardware Edge Detection count. This problem also exists when processing with software, which is solved by some searches. In the near future, CCD is not likely to see the outside of the track due to the field of vision. Therefore, the position of the Start search column can be determined, and then gradually go back to a small range of search, of course, there are some other Error Tolerance ideas that will not be repeated here. On the hardware layer, it can also achieve gradual search: when the first line of signal enters, according to the center of the previous line, the video signal detection time is properly delayed, skip the interference zone, then, it detects the hop point. After the bank's signal detection is complete, or when the number of hops detected exceeds a certain number, the bank will stop detection and then the next line will be detected.

A row can store useful (edge hop) Information in this limit only with an array of about 10. For general edge interference, through local search, 10 pieces of data can also store useful information of the bank. In this way, the conflict between storage space limitations and image accuracy cannot be solved. In the past, 4 K could only store 40 rows of point columns with 96 horizontal columns, currently, the number of rows that can be stored in a new vertex column can even reach more than 320, while the CCD's row video signal only has 320 rows. Therefore, it does not make much sense to collect many rows. More importantly, it can extract hardware from the center. All we need to do is to make fault tolerance and judgment on the software. In addition, the horizontal resolution is meaningless because of the 16-bit tcnt count, no matter how fine the black line is, as long as the CCD can be seen on the CRT display, tcnt can be recorded, so there is basically no phenomenon that the black line width in the distance is too small or even disappears.

Software:

(2) use the new data structure and time for space, so that more data can be stored in a limited space without using counters, which naturally improves the accuracy of image collection.

The switch quantity is stored in a single-digit array. Each 8 switch quantity can be stored in a single-digit array, which saves 7/8 of the horizontal storage space. In this way, the vertical precision and horizontal precision can be improved, however, this is at the cost of MCU computing. Because xs128 does not support bit addressing, the bit access efficiency of the image will change to 1/3 of the original direct access to the byte, I don't know whether this sacrifice can be tolerated. If you can tolerate it, You can store more than 160 rows of images with 200 horizontal resolution in 4 K space.

This is in exchange for space by time. ad in the past also tried it. At that time, due to the limitation of the AD frequency in xs128, the storage of image bit greatly affected the adconversion, therefore, less than 96 points are collected for a row. However, with the hardware binary value, there is no AD wait time. Currently, the 8 M frequency can be read, and 120 points can be collected per line. If the frequency is increased, it can make up for the time occupied by the bit structure storage. Therefore, there is no problem in the collection theory.

Bit structure data types are as follows:

 

Code

  Typedef unsigned  Char     Byte  ;
 //  Binary Image bit structure-Saves MCU memory overhead (8-bit pixel value)  
  Typedef Union {
  Byte  Byte;
  Struct  {
  Byte  B0:  1  ;  /*  Bit 0  */  
  Byte B1:  1  ;  /*  Bit 1  */  
  Byte  B2:  1  ;  /*  Bit 2  */  
  Byte  B3:  1 ;  /*  Bit 3  */  
  Byte  B4:  1  ;  /*  Bit 4  */  
  Byte  B5:  1  ;  /* Bit 5  */  
  Byte  B6:  1  ;  /*  Bit 6  */  
  Byte  B7:  1  ;  /*  Bit 7  */ 
} Bits;
} Byte; 

 

 

Perform operations like an operation struct, and store the switch quantity one by one. This method has one disadvantage: low computing efficiency. Because the HCS12 series chips do not support bit addressing, the actual operation is to read one byte and eight bits for access, then, bitwise operations are performed with the corresponding data to extract the data of a certain bit. In this way, the data reading efficiency becomes very low. Therefore, this is a method of exchanging time for space. Whether it can be used in practice depends on the comparison of advantages and disadvantages in actual application.

2.3.4 Comparison of several solutions.

collection method	advantages	disadvantages
In-chip AD	the circuit is easy to design and uses the internal integration module of the chip to reduce the image distortion.	the horizontal precision of the image is difficult to improve, and it is difficult to segment the image threshold during processing.
parallel ad	the image is of low distortion and can meet user requirements.	too many I/O resources are occupied, the circuit design is cumbersome, and the image segmentation problem occurs eventually.
hardware binary	hardware is used to split the image and the output is a TTL level. The accuracy can be considered unlimited.	after the external information is directly binarization, it is delivered to the chip for processing, which means that a lot of information is lost. At the same time, when the vehicle is in motion, the collection of horizontal black lines may be unstable.