Chapter II Summary of relevant contents of register

For a assembler programmer, the main component in the CPU is the register. Registers are parts of the CPU that programmers can read and write with instructions. Programmers can control the CPU by changing the contents of various registers. Different CPUs, the number of registers, the structure is not the same. 8086CPU has 14 registers with a name for each register.

All registers of 8086CPU are 16-bit and can hold two bytes. AX, BX, CX, DX, these 4 registers are usually used to hold general data, known as general-purpose registers. For compatibility reasons, 8086CPU can process data in the following two sizes at once. Byte: In bytes, a byte consists of 8 bits and can exist in a 8-bit register. Word: Recorded as Word, a word consists of two bytes, these two bytes are called the word's high-order byte and low byte.

We know that when the CPU accesses the memory unit, it gives the address of the memory unit. All memory units consist of a one-dimensional linear space, and each memory unit has a unique address in this space, and we call this unique address a physical address. When the CPU is fed into memory via address bus, it must be the physical address of a memory unit. The physical address must be formed internally before the CPU is issued a physical address to the address bus. Different CPUs can have different ways of forming physical addresses.

The 8086CPU has a 20-bit address bus that can transmit 20-bit addresses and achieve 1MB addressing capabilities. 8086CPU is also a 16-bit structure, in the internal one-time processing, transmission, temporary storage address is 16 bits. From the internal structure of the 8086CPU, if the address from the internal simple, then it can only send out 16-bit address, the performance of the addressable capacity is only 64KB. 8086CPU uses a method that is internally synthesized with two 16-bit addresses to form a 20-bit physical address.

The essential meaning of "segment address *16+ offset address = Physical Address" is that when the CPU accesses memory, it adds a base address (segment address *16) and an offset address relative to the base address to give the physical address of the memory unit. More generally, 8086CPU of this addressing function is a "base address + offset address = Physical Address" Addressing mode of a specific implementation scheme. In 8086CPU, segment address *16 can be considered as the base address.

So in summary, when the CPU accesses the memory unit, it must provide the memory with the physical address of the memory unit. 8086CPU creates the final physical address with the addition of a segment address and offset address shift internally. The CPU can form the same physical address with different segment addresses and offset addresses. The offset address is 16 bits, the range is 0~FFFFH, and only the offset address can be used to locate up to 64KB of internal deposit cells. For example, given segment address 1000H, with offset address addressing, the CPU's addressing range is: 10000H~1FFFFH. In a 8086PC machine, the address of the storage unit is described by two elements, that is, the segment address and the offset address.

CS and IP are the two most critical registers in 8086CPU, which indicate the address at which the CPU is currently reading instructions. CS is the code segment register, the IP is the instruction pointer register, from the name we can see the relationship between them and the instruction. CS holds the segment address of the instruction, and the IP holds the offset address of the instruction. In 8086, at any moment, the CPU will cs:ip the content pointed to as instruction execution.

Through this chapter, we understand the logical structure of 8086CPU, the method of forming physical address, related registers and some instructions from the angle of how the CPU executes the instruction.

Chapter II Summary of relevant contents of register