Co-processor, Wang Ming learning Learn

Co-processor

The coprocessor is used to perform specific processing tasks, such as: The math coprocessor can control digital processing to reduce the burden on the processor. ARM can support up to 16 coprocessors, where CP15 is the most important one.

CP15 provides 16 sets of registers

Access CP15 by providing 16 sets of registers

One, coprocessor access

ARM microprocessors can support up to 16 coprocessors for various coprocessor operations, and during program execution, each coprocessor executes only its own co-processing instructions, ignoring the ARM processor and other coprocessor directives.
ARM's coprocessor directives are primarily used by ARM processors to initialize the arm coprocessor's data processing operations, and to transfer data between the registers of the ARM processor and the registers of the coprocessor, and between the registers and the memory of the arm coprocessor. The arm coprocessor directive includes the following 5 articles:
-CDP coprocessor Number Operation instruction

-LDC coprocessor Data Loading instructions

-STC coprocessor Data store directives

-MCR ARM Processor Register to coprocessor register data transfer Instructions

-MRC coprocessor register to ARM processor Register data transfer instructions

1.1CDP instruction

The format of the CDP Directive is:
cdp{conditions} coprocessor code, coprocessor opcode 1, Destination register, source register 1, source Register 2, coprocessor operation code 2.

The CDP instruction is used by the ARM processor to notify the arm coprocessor to perform specific operations, resulting in undefined instruction exceptions if the coprocessor does not successfully complete a particular operation. wherein the coprocessor operation code 1 and the coprocessor operation code 2 is the coprocessor will perform the operation, the destination register and the source register is the coprocessor register, instruction does not involve the ARM processor register and memory.
instruction Example:
CDP p3,2,c12,c10,c3,4; The directive completes the initialization of the coprocessor P3

1.2LDC Instruction

The format of the LDC Directive is:

ldc{condition}{l} coprocessor encoding, destination register, [source Register]

The LDC directive is used to transfer the word data in the memory pointed to by the source register to the destination register, resulting in an undefined instruction exception if the coprocessor cannot successfully complete the transfer operation. Where the {L} option indicates that the instruction is a long read operation, such as a transmission for double-precision data.
instruction Example:
LDC P3,c4,[r0]; transfers the word data in the memory pointed to by the ARM processor's register R0 to the register C4 of the coprocessor P3.

1.3STC Instruction

The STC directive is in the form of:

stc{condition}{l} coprocessor encoding, source register, [destination Register]

The STC directive is used to transfer the word data from the source register to the memory pointed to by the destination register, resulting in an undefined instruction exception if the coprocessor cannot successfully complete the transfer operation. Where the {L} option indicates that the instruction is a long read operation, such as a transmission for double-precision data.
instruction Example:
STC P3,C4,[R0]; transfer the word data from the register C4 of the coprocessor P3 to the memory pointed to by the Register R0 of the ARM processor.

1.4MCR instruction
The format of the MCR instruction is:
mcr{conditions} coprocessor code, coprocessor opcode 1, source register, purpose register 1, Purpose register 2, coprocessor operation code 2.
The MCR instruction is used to transfer data from the ARM processor register to the coprocessor register, resulting in undefined instruction exceptions if the coprocessor does not complete successfully. wherein the coprocessor operation code 1 and the coprocessor operation code 2 is the coprocessor will perform the operation, the source register is the ARM processor register, the purpose register 1 and the purpose Register 2 are coprocessor registers.
instruction Example:
MCR p3,3,r0,c4,c5,6; This instruction transfers data from the ARM processor register R0 to the register C4 and C5 of the coprocessor P3.

1.5MRC instruction

The format of the MRC Directive is:

mrc{conditions} coprocessor code, coprocessor opcode 1, Destination register, source register 1, source Register 2, coprocessor operation code 2.

The MRC directive is used to transfer data from the Coprocessor register to the ARM processor register, resulting in undefined instruction exceptions if the coprocessor does not complete successfully. wherein the coprocessor operation code 1 and the coprocessor operation code 2 is the coprocessor will perform the operation, the purpose register is the ARM processor register, the source register 1 and the source Register 2 are the coprocessor registers.
instruction Example:
MRC p3,3,r0,c4,c5,6; This directive transmits data from the registers of the coprocessor P3 to the ARM processor registers.

Co-processor, Wang Ming learning Learn