Commonly used arm assembly instructions (1)

Source: Internet
Author: User
Tags arithmetic constant constant definition exception handling
1. The BLX instruction jumps from the arm instruction set to the destination address specified in the instruction and switches the processor's working state from the arm state to the thumb state, which simultaneously saves the current contents of the PC to the register R14. Therefore, when the subroutine uses the thumb instruction set, and the caller uses the arm instruction set, the subroutine's call and the processor's working state can be toggled through the BLX instruction. At the same time, the return of the subroutine can be done by copying the register R14 value to the PC.






2. In addition, there are reverse subtraction instructions RSB:RSB.W rd,rn, #imm12; Rd = Imm12-rn RSB. W Rd,rn, Rm; Rd = RM-RN.CPSR: The program State Register (current programs status register) CPSR is used to store the condition code at user-level programming, CPSR contains the condition code flag, interrupts the stop bit, present processor mode, and other state and control information.




3. Backup Program Status register SPSR (Backups programs statues register). When a particular exception interrupt occurs, SPSR is used to store the contents of the CPSR, and after the exception interrupt processing is complete, the CPSR can be restored with the contents of the SPSR. Protection has been achieved and the interruption of the site has been resumed. The SPSR format is exactly the same as the CPSR format.


The 4.B instruction (Branch) denotes an unconditional jump, B main; jumps to the code where the designator is main, and the BL instruction (Branch with Link) represents a jump with a return value. BL more than B to do a step, before jumping, BL will save the current position in the R14 (that is, the LR register), when the jump code ends, with the Mov PC,LR instructions to jump back, which is actually the C language execution function usage, the compilation of the tone program are used BL, after performing the sub-function, you can use MOV PC, LR jumps back. MVN R0, #0; pass 0 counter (i.e.-1) to R0.




5.LDR R0,[R1]; The value of R1 is treated as an address, and then the data is loaded into R0 (R0=*R1) from this address. LDR r1,=0x30008000; The value of the 0x30008000 is loaded into the R1, and Ldr is preceded by a constant =. (Note the difference with MOV, MOV is #). STR (store) is used to store the value of a register in an external storage space, which is the inverse operation of LDR. STR R0,[R1]; The value of the R0 is credited to the R1 corresponding address space (*R1 = R0).




6.ADDS R0,R1,R2; R0=r1+r2,adds s means to write carry results to CPSR,ADC R5,R3,R4; R5=r3+r4+c. SUBS R0,R1,R2; R0=r1-r2,subs s means to write carry results to CPSR,SBC R5,R3,R4; R5=r3-r4-c






7.AND bit with instruction and R0,R1, #0xFF;  R0=R1 & 0xFF;   TST tests whether a person is 1, and writes the result to CPSR, for the next sentence to use, TST R1, #0xffe; Equivalent to if (R1 & 0xffe);






8.BIC clearance Operation Bic r0,r0,#%1011; the command clears the bits in the R0 0 1 3, the remaining bits remain; % is binary, 0x indicates hexadecimal.






9.LDMIA r0! , {R3-R9}; Add R0 points to the address of the continuous space data, save to R3-R9,! Represents the R0 value update, the IA suffix indicates that the LDMFD is incremented by word, the recovery scene, exception handling returns, ^ indicates that the user mode is not allowed




10.STM passes a value from the Register list to the storage space. Stmia R1!,{R3-R9}; Stores the R3-R9 data to the address that R1 points to, and the R1 value is updated. STMFD SP!,{R0-R7,LR}; Save in the field and R0~R7,LR into the stack






11.ASR (arithmetic right shift), ROR (loop right Shift) Rrx with extended loop right shift. Symbol definition Directive global variable definition Gbla, Gbll,gbls. Local variable definition lcla,lcll,lcls. Variable assignment seta,setl,sets in the above pseudo-directive, the last side of a represents assigning a value to an arithmetic variable, l means assigning a value to a logical variable, and s representing a string assignment.




12.SPACE defines a memory space and initializes it with 0. DCB defines a contiguous byte memory space initialized with the expression expr of the pseudo-instruction. You can typically use a defined data table, or a literal string.  (This is equivalent to sets) for the initial binary buffer. DCU defines the memory space (DCB is bytes) of a segment of a word and initializes it with a subsequent expression.




13. Byte alignment ALIGN defines a numeric constant definition EQU. Declares an external symbol import,extern imports a symbol externally, typically an external program global variable.




R7: Stack frame pointer (frame Pointer). The address on the stack that points to the previous saved stack frame (stack frame) and the link register (link register, LR)
R13: Also known as SP (stack pointer), is the stack top pointer
R14: Also called LR (link Register), which stores the return address of the function.
R15: Also called PC (program counter), point to the current instruction address
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R0,R1,R2,R3, when calling a function, is used to hold the first 4 function arguments and return values,
R4-r11,r14, these registers must be saved to the stack when the function is called. If the function's
With more than 4 parameters, the extra parameters are stored in the stack, i.e. sp,sp+4,sp+8,... In turn.
TEQ r1,r2; Sets the value of the register R1 to the value of the register R2 and set the CPSR flag bit based on the result
tst{condition} operand 1, operand 2 meaning: The bitwise AND operation of the contents of the register and another register is performed, and the value of the conditional flag bit in the CPSR is updated according to the result. It is generally used to detect whether a particular bit is set.
CLZ Count left Zero calculates the number of the highest end 0 of the operand, and the CLZ instruction returns the number of the first 1 in the binary encoding of the operand.
The RSB instruction is called the reverse subtraction instruction, which subtracts the operand 2 from the operand 1 and stores the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. This directive can be used for the subtraction of signed or unsigned numbers.
Instruction example: RSB r0,r1,r2; R0 = R2–r1




14.STMFD sp!, {r0~r7, LR}, start_address = sp-9 * 4, end_address = sp-4
Register R0~R7 and LR (R14) A total of 9 registers, stored to start_address start, to the end_address end of the stack, and modify the value of the SP (SP smaller), equivalent to the compression stack. LDR R0,[R1,R2]; reads the word data with a memory address of R1+R2 into the register R0.

DCD/DCDU: Used to allocate a contiguous word storage unit and initialize it with the specified data. ADRL: Loads the address relative to the program or relative to the register into the register. Similar to the ADR directive. ADRL generates two data processing instructions, so it is wider than the address range that the ADR loads.


Transferred from: http://blog.csdn.net/u010725842/article/details/48877133

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