Comparison of the use of the Altera OpenCL SDK with Xilinx SDAccel

For job requirements, the two high-level language synthesis tools were applied, and the typical algorithms were implemented and evaluated (data is temporarily kept secret).

Briefly talk about the experience of using.

1. Altera OpenCL SDK

First, you need to install Quartus (more than 13.1 version) and the supporting Soc EDS, respectively, apply for two license, one for the OpenCL SDK, one for soceds, indispensable.

Then need to have implementation platform, I use the DE1-SOC Development Board. The platform provides an open CL BSP, which can be used to implement its own algorithm with the given examples modification.

Soceds is used to compile the host code, this is arm;

The Open clsdk is used to compile the device code to generate the. Aocx binaries, which need to be configured by arm on the FPGA.

The long development cycle is to compile the open CL project, which takes about 40min on my laptop (CPU core I5-4300,8GB memory).

The optimized open CL can be #pragma by compiling the option, compiling the instruction statement.

The open CL BSP comes with hardware engineering that can be opened for viewing with Quartus, but the open CL related logic inside is encrypted and cannot be modified.

The Open CL SDK does not have a graphical interface and can only be run at the command line, automatically invoking Quartus_map, Quartus_fit, Quartus_sta and other tools.

2. Xilinx SDAccel

The previous article describes the Xilinx Vivado and Vivado HLS tools. According to my guess, sdaccel is just a layer of packaging, content or HLS. Sure enough.

Software installation is less convenient, only apply SDAccel license can use all Xilinx software features. This is more humane than Altera.

Children's shoes with HLS tools know that this thing is developing fast, but in fact it is only 10% progress, the trouble is behind it, the system integration will spend the remaining 90% of the time.

SDAccel is one such tool for developing complete projects.

The code written with open CL is converted to HLS project, and its optimization strategy is mapped to HLS optimization, so the children's shoes that have been learned from HLS can be easily transferred to SDAccel.

The most important steps are the tools that are automatically completed. Just Build_system, Package_system, wait a few 10 minutes to get a straight-running installation package.

SDAccel don't need you really have a development board, it can be directly with the CPU simulation, easy to debug.

SDAccel can be developed using graphical interfaces (like HLS) and executed at the command line. Upload a spy photo.

Summary

One of the advantages of using OPENCL is that it can be run on the FPGA simply by making a slight change to the original CPU, C, C + +, Cuda code on the GPU.

Both tools bring a certain development convenience, but really want to use these tools, still need to have a deep understanding of the computing architecture, the algorithm itself.

Comparison of the use of the Altera OpenCL SDK with Xilinx SDAccel