Compilation--Logic instructions

Logical operation instruction and, or, not, XOR, TEST

Shift Commands SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR

* OPR cannot be an immediate number

* Does not affect the flag bit

SF ZF PF based on operation results

Logical AND arithmetic left SHL sal logic right shift shr arithmetic right shift SAR

Loop left ROL loop right Shift ROR

with carry loop left shift RCL with carry loop right shift RCR

The loop is the start of R, and the loop is self-rotating.

The logic adds 0, and the arithmetic right shift complements the one on the side.

CNT = 1, SHL OPR, 1

CNT > 1, MOV CL, CNT

SHL OPR, CL; a case study of SHL

Cyclic shift instruction: does not affect SF, ZF, PF, AF

String processing instructions:

MOVSB MOVSW direction Sign df = 0 o'clock with +, DF = 1 o'clock with-

Movs/stos/lods to work with REP

REP Movs/stos/lods Perform the operation:

(1) if (CX) = 0 Exit REP, otherwise turn (2)

(2) (CX)? (CX)-1

(3) Execution movs/stos/lods

(4) Repeat (1) ~ (3)

REP MOVS: Transferring the entire string of data in a data segment to an additional segment source string (data segment) → Destination string (additional segment)

(1) Source string header address (end address) →si

(2) Destination string header address (end address) →di

(3) String length →cx

(4) Establish the direction flag (CLD = 0,std df = 1)

Other processor control instructions

BOUND limit directive

ENTER to create a stack frame

LEAVE Releasing Stack frames

Privileged Directives

Compilation--Logic instructions