Code generation:
Intermediate representation + symbol table, command selection, register assignment and assignment, order ordering
8.2 Target Language
8.2.1 1) x = 1
LD R, #1
ST X, R
3) x = a+1
LD R, a
ADD R, #1
ST A, R
5) x = B*c
LD R1, b
MUL R1, C
ST x, R1
8.2.2 1) x=a[i] y=b[j] a[i]=y b[j]=x
LD R0 I
MUL R0, 4
LD R1 A (R0)
LD R0 J
MUL R0, 4
LD R2 B (R0)
ST A[i] R2
ST B[j] R1
2) x=a[i] y=b[i] Z=x*y
LD R0 I
MUL R0, 4
LD R1 A (R0)
MUL R1 B (R0)
ST Z R1
8.2.3 y=*q q=q+4 *p=y p=p+4
LD R1 Q
LD R2 0 (R1)
ADD R1 #4
ST Q R1
LD R1 P
ST 0 (R1) R2
ADD R1 #4
ST P R1
8.2.4
LD R1, X
LD R2, Y
SUB R1-R2
Bltz R1, M//m generates the first instruction position for L1
8.2.5
LD R1, S
ST R1, 0
LD R2, I
ST R1, 0
LD R3, N
L1:CMP R2, R3
JG L2
ADD R1, R2
ADD R2, #1
GOTO L1
L2:
8.2.6 1) 2+2+1+2 8.3 address in target code
8.3.1 did not understand the title of what the meaning of return, the following did not consider return. Suppose this is a piece of code in main
100:ld SP, #600
108:action1
128:add sp, SP, #msize
136:st 0 (SP), #152
144:BR 300
152:sub sp, SP #msize
160:add sp, SP #msize
168:st 0 (SP), #184
176:BR 400
184:sub sp, SP #msize
192:add sp, SP #msize
200:st 0 (SP), #216
208:BR 500
216:sub sp, SP #msize
300:action
320:BR *0 (SP)
400:action
420:BR *0 (SP)
500:action
520:BR *0 (SP)
8.3.2 and 8.3.3 8.3 do not have similar examples, the stack allocation is important to determine the address, you can use these statements as the first statement in the function to generate code 8.4 Basic block and flow graph
8.4.11 double cycle A triple loop, a two-cycle three address statement similar to the upper half of figure 8-7, the flow graph is similar to Figure 8-9B1-B4, the loop includes example 8.9 in 1 and 3, the following practice the triple loop
1)
1 i = 0
2 J = 0
3 k = 0
4 T1 = N*i
5 T2 = t1 + j
6 T3 = t1 + k
7 T4 = N*k
8 T5 = T4 + j
9 T6 = a[t3] * B[T5]
Ten c[t2] = C[t2] + T6
K = k + 1
if (k<n) Goto 4
j = j + 1
if (j<n) Goto 3
i = i + 1
if (i<n) Goto 2
2) Triple loop flow graph:
B1 1
B2 2
B3 3
B4 4-12
B5 13-14
B6 15-16
3) There are 3 loops: B4 itself, b3b4b5,b2b3b4b5b6
8.4.2 similar, slightly 8.5 basic block Optimization
8.5.1
A1
+ (E) * (D,B)
A0 B0 C0
8.5.2
1) Only a active, the first line can be optimized out
2) ABC active, then the same first line d=b*c can be optimized out
8.5.3 B6 principle similar to 8.5.1, slightly
8.5.4 B3 principle similar to 8.5.1, slightly
8.5.5
1) a[i]=b A is set to inactive, B is set to active, affecting all references to array a
2) A=b[i] A is set to inactive, B is set to active and affects all references to array b
3) A=*b A is set to inactive, B is active, and all references to B are active from the backward-forward scanning process
4) *a=b A is set to inactive, B is active, and all references to a are inactive from the backward-forward scanning process.
8.5.6, it's too much trouble to draw trees here.
1) p can point to anywhere, then *p= ... So that all the nodes that are constructed are killed each step constructs the result:
A[i] = b
[]=
I0 B0
*P=C nodes []=, I0, B0 are killed
[]= *= P
I0 (k) B0 (k) C0 (k)
D=A[J]
=[] (d)
A0 J0
[]= *= P
I0 (k) B0 (k) C0 (k)
E=*p
=[] (d)
A0 J0 =* E
[]= *= P
I0 (k) B0 (k) C0 (k)
*p = A[i] to: T=a[i] *p=t
T=a[i]
=[] (t) =[] (d)
T0 A0 j0 =* E
[]= *= P
I0 (k) B0 (k) C0 (k)
*p=t all the nodes above have been killed.
2) p can point to B or D, then *p= ... Causes the node to be constructed with a B or D as a variable to kill
8.5.7 E=*p-E=c
8.5.8
T0 = A+c
T1 = t0+e
y= T0+T1
T2 = Y+b
T3 = y+d
x = t3+f 8.6 A simple code generator Choose 3 to Practice: 1) 5) (assuming array size is x[i][10])
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X=a+b*c |
A[I][J]=B[I][K]+C[K][J] |
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8.6.1 |
T0=b*c X=a+t0 |
T0=i*10 T1=t0+k T2=B[T1] T3=k*10 T4=t3+j T5=C[T4] T6=t0+j T7=t2+t5 A[t6]=t7 |
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8.6.2 |
... |
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8.6.3 |
LD R1, b LD R2, C MUL R1, R1, R2 LD R2, a ADD R1, R1, R2 |
Load B[i][k] LD R1, I MUL R1, R1, 10 LD R2, K ADD R3, R1, R2 LD R4, PB ADD R4, R4, R3 Load C[k][j] MUL R2, R2, 10 LD R3, J ADD R2, R2, R3 LD R5, PC ADD R5, R5, R2 Add ADD R6, 0 (R4), 0 (R5) ADD R1, R1, R3 LD R2, PC ADD R2, R2, R1 ST 0 (R2), R6 |
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8.6.4 |
.. |
L |
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8.6.5 |
.. |
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8.6.4 this question and 8.6.5 register allocation is a big problem, section 8.8 has related introduction
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R1 |
R2 |
R3 |
I |
J |
K |
Pa |
Pb |
Pc |
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LD R1, I |
I |
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I,r1 |
J |
K |
Pa |
Pb |
Pc |
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MUL R1, R1, 10 |
T0 |
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I |
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LD R2, K |
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K |
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K,r2 |
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ADD R3, R1, R2 |
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T1 |
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LD R1, PB |
Pb |
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Pb,r1 |
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ADD R1, R1, R3 |
T2 |
K |
T1 |
I |
J |
K,r2 |
Pa |
Pb |
Pc |
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MUL R2, R2, 10 |
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T3 |
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K |
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LD R3,j |
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J |
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J,r3 |
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ADD R2, R2, R3 |
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T4 |
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LD R3, PC |
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Pc |
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J |
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Pc,r3 |
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ADD R3, R2, R3 |
T2 |
T4 |
T5 |
I |
J |
K |
Pa |
Pb |
Pc |
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ADD R1, R1, R3 |
T7 |
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LD R2, I |
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I |
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I,r1 |
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MUL R2, R2, 10 |
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T0 |
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I |
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LD R3, J |
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J |
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J,r3 |
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ADD R2, R2, R3 |
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T6 |
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LD R3, PA |
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Pa |
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J |
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Pa,r3 |
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ADD R2, R2, R3 |
T7 |
A[I][J] |
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ST R2, R1 |
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8.6.5 only 2 registers need to save the value to the stack or temporary variable, the principle is similar, just the data back and forth Daoteng multipoint 8.7 peep hole optimization
Slightly 8.8 Register allocation and assignment
Example 8.17 Calculation Formula 8.1:
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Use (X,B) |
Live (X,B) |
A/4 |
B2,b3 |
B1 |
B/5 |
B1 |
B3,b4 |
C/3 |
B1,b3,b4 |
-- |
D/6 |
B1,b2,b3,b4 |
B1 |
E/4 |
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B1,b3 |
The book only describes the algorithm no examples, only on their own, 8.8.4 in the example of the wrong, consider the two nodes should be a and d, not A and B
8.8.1 only consider B1
A=b+c |
LD R0, b LD R1, C ADD R2, R0, R1 ST a R2 |
B,c Active |
D=d-b |
LD R3, D SUB R3, R3, R0 ST D, R3 |
D,b Active |
E=a+f |
LD R4, F ADD R5 R2, R4 ST E, R5 |
A,f Active, E inactive |
K=6, Side includes:
D-a, D-f
A-f, a-d, a-B
A--D
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b F
A,b,d each color, b can be a color with F
8.8.2 The register that holds the global variable can not be overwritten. 8.9 by tree rewrite to select instruction 8.9.1 1) = x + * * a b C D 8.10 Generation of optimized code for expressions
Example 8.25
T4 t1 T3 base=1 k=3
T3 e T2 base=2, k=2 m=1
T2 C D LD R3, D; LD R2, C; ADD R3, R2, R3
LD R2, E
MUL R3, R2, R3
T2 a B base=1 k=2
LD R2, b
LD R1, a
SUB R2, R1, R2
ADD R3, R2, R3
8.10.1 1) A/(B+c)-d* (e+f)
T5=t2-t4
T4=d*t3
T3=e+f
T2=a/t1
T1=b+c
T5 (3)
T2 (2) T4 (2)
A1 T1 (2) d1 t3 (2)
B1 C1 E1 F1
2) a+b* (c* (d+e))
T4=a+t3
T3=b*t2
T2=c*t1
T1=d+e
T4 (2)
A1 t3 (2)
B1 T2 (2)
C1 T1 (2)
D1 E1
3) (-a+*p) * ((B-*Q)/(-C+*R))
T10 = T3*t9
T9=t5/t8
T8=t6+t7
T7=*r
T6=-c
T5=b-t4
T4=*q
T3=t1+t2
T2=*p
T1=-a
T10 (3)
T3 (2) T9 (3)
T1 (1) T2 (1) T5 (2) T8 (2)
-A1 * P1 b1 t4 (1) T6 (1) T7 (1)
* Q1-C1 * R1
8.10.2 to 2), similar to Example 8.25, example 1) and 3) similar to 8.27
8.10.3 Similar example 8.25
8.10.4 for a node, false with N child nodes, n<=2 similar to 8.10.1 described, if n>=2, assuming that each child node labeled a1< A2 < ... < an,
The compute node designator value A method is as follows:
Initialize A=an, k=n, x=0
for (i=n; i>1;-I.)
if (Ai-a (i-1)) >0)
x+= (Ai-a (i-1));
else if (x>0)
x--;
Else
a++;
The explanations are as follows:
Assuming that the child nodes are in ascending order from left to right, then check from right to left, if the label is the same as the next two sub-nodes, you need to add a register to store the intermediate result.
Otherwise, if the two adjacent sub-node labels differ by 1, you do not need to add a register
Otherwise, if the two adjacent sub-nodes are >1, not only do not need to add registers, but also spare (difference-1) registers during the scanning process to use
8.10.5 can use 8.10.4 method.
8.10.6
If the two child nodes are labeled the same, the node designator equals the child node designator
If the two child node labels are different, the node designator equals the left child node designator
8.10.7 is guaranteed to meet requirements when loading values (* and/two variables in adjacent registers) 8.11 using dynamically planned code generation
Example 8.28 cost vector description, only description-/(3,2,2), the remaining slightly
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1 Registers saved to memory |
1 Registers saved to register |
2 Registers saved to register |
ABCDE (0,1,1) |
0: Save to Memory |
1 Registers saved to register |
2 Registers saved to register |
-/(3,2,2) |
LD R0 A SUB R0 b ST a R0 |
LD R0 A SUB R0 b |
LD R0 A SUB R0 b |
* (5,5,4) |
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+ (8,8,7) |
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8.11.1
1) Ca (0, 1, 1)
2) Mx (0, 1, 1)
3) = (3, 2, 2)
4) = (1, 1, 1)
5) IND (3, 2, 2)
6) + (4, 2, 2)
7) + (2, 1, 1)
8) + (2, 1, 1)