CORTEXM 8-byte alignment and keyword PRESERVE8 of the kernel stack

First, what is stack alignment?

The byte alignment of the stack, which actually refers to the stack top pointer must be an integer multiple of a byte. Therefore, the bottom of the system stack and MSP, the task stack and the PSP, stack alignment and SP alignment of the three concepts do not differentiate. In addition, when the compiler is mentioned below, it is actually a generic term for the compiler assembler connector.

Before the stack of 8-byte alignment understanding, on the Internet to check a lot about the stack byte alignment, there are some arm alignment pseudo-instruction information, and do some experiments, the pieces of information splicing together, always feel the understanding of this problem is a lengthy speech. Results yesterday read the AAPCS manual, and then found that no use of PRESERVE8 pseudo-instructions error instances, suddenly feel that there is no long-winded, half a little theory this problem can be straightened out.

Second, aAPCs stack use of the Statute

Programming on ARM, whenever involved in a call, you need to follow a set of protocol aapcs: "Procedure calls standard for the ARM Architecture". In this protocol, the following conventions are used in the face of stacks:

5.2.1.1
Universal stack constraints
At all times, the following basic constraints must hold:
Stack-limit < SP <= Stack-base. The stack pointer must lie within the extent of the stack.
SP mod 4 = 0. The stack must at all times is aligned to a word boundary.
A process may only access (for reading or writing) The closed interval of the entire stacks delimited by [SP, stack-base– 1] (where SP is the value of register R13).
Note
This implies that instructions of the following form can fail to satisfy the stack discipline constraints, even when Reg p Oints within the extent of the stack.
LDMXX Reg, {...}, SP, ...}/reg! = SP
If execution of the instruction is interrupted after SP have been loaded, the stack extent won't be restored, so restart ing the instruction might violate the third constraint.
5.2.1.2
Stack constraints at a public interface
The stack must also conform to the following constraint at a public interface:
SP mod 8 = 0. The stack must be double-word aligned.

As you can see, the protocol specifies that the stack should be 4 bytes aligned at any time and 8 bytes aligned at the invocation entry.

In this convention, the 4-byte alignment of the stack does not have to be adhered to at any time, and it is difficult to do so, because the last two bits of the SP are kept 0 on the hardware. For 8-byte alignment, this requires code farmers and compilers to work together. One point to note is that 8-byte alignment even if you do not follow, in some cases also no problem, as long as the keynote and the use of the two-way side of the stack used on both sides, the transfer of parameters, return and other processing good, that is, both sides have their own set of conventions on the line. But sometimes, when calling a function that strictly adheres to aapcs, the keynote side does not keep the stack at 8-byte alignment, which can be problematic.

Third, how to program?

When programming on the Cortex M3, there are generally two rules for compliance with the AAPCS stack use conventions:

1. The assembly document requires us to do our own work to ensure compliance with the AAPCS stack use convention.

(Pay special attention to every time from the assembly into the world of C, to ensure that the assembly part of the code in the call C interface stack is 8-byte alignment, do not neglect, because the C compiler is not responsible for tuning.) The C compiler said you had to give me the SP is 8-byte aligned, I can guarantee that the next C part is not finished, adhere to the AAPCS stack use Convention)

2. In the C file, it is handled by the compiler.

Iv. Additions:

1. Since the entry point of the program is the reset interrupt response function, generally we are written in the startup code, usually a assembly file, and then through the assembly into the main entrance to the C program, at the time of the call to main, to follow the aapcs, you have to maintain 8-byte alignment at this time.

2. For Msp,keil MDK We are provided with a function _main that initializes the C runtime environment, which invokes the _USER_SETUP_STACKHEAP function, which zeroes out the low three bits of the MSP and then does not change it before entering main. This allows the MSP to be guaranteed to be 8-byte aligned at the moment it enters main.

3. For the PSP, generally in the multitasking OS will use it, for the PSP we have to worry about more than MSP, because MSP can at least by calling _main to jump into the main way to ensure that the time to enter the C world is to abide by the Convention. The PSP relies on its own to ensure that every time it enters the C world, it is 8-byte aligned.

4. In addition, as long as the assembly file, can be used in conjunction with the assembly command Armasm-diag_warning 1546, so that the assembler will be some SP not 8-byte alignment of the place to give a warning, But I found that the assembler was not guaranteed to detect all 8-byte misalignment of the SP, such as loading an immediate number directly into the SP, which the assembler could not find. I did not test all the instructions that would affect the SP (the reason is not familiar ...). ), do not know how many instructions 1546 this warning can cover, so generally speaking, the assembly file is to open their own titanium alloy eye, to fight for most of the work is put in C.

Five. cortex-m3 The stack alignment adjustment function of the interrupt controller (this function is turned on by default in the kernel after the r2p0 version, the stkalign bit defaults to 1)

Cortex M3 NVIC CCR Register (Control and configuration Register) stkalign position 1, then in the event of an outage, before entering the interrupt response function, the kernel will first check whether the stack pointer currently in use is 8 byte aligned, if so, it will normally xpsr,pc,lr,sp, R0-r3 into the stack, if not, first the SP-4, adjusted to 8-byte alignment, then the XPSR nineth position 1, and then xpsr,pc,lr,sp,r0-r3 into the stack, and then into the interrupt response function. This ensures that the program is in operation, if there is no 4-byte alignment on the stack where the interruption occurs, into the interrupt response function is also to comply with the AAPCS stack use convention. If the interrupt service program is to do the task switching, then the previous situation is to adjust the task stack to align, and then enter the exception service after the use of the system stack, then if the system stack is not aligned? What if the interrupt controller does not make adjustments to the system stack when it is interrupted for task switching? In fact, this is not to worry, take μc/Os as an example, the cortex-m3 usually use the PENDSV exception to do task switching, the OSCTXSW and OSINTCTXSW are set to only complete the PENDSV exception trigger function, The task is then toggled in the PENDSV exception service program. Since the power-on time system in the privileged mode, as long as we guarantee from the power up to the first system call, the use of the stack is the system stack MSP , so that even if the first time to enter the task switch when the MSP is not aligned, the interrupt vector controller will be adjusted to 8-byte alignment state, Although this first task switchover will no longer use MSP except for interrupts, the MSP will be 8-byte aligned as long as we ensure that all assembly parts do not break the 8-byte alignment protocol.

Vi. about align attributes and PRESERVE8 pseudo-directives

In the boot code of the cortex M3 chip, these two pseudo-directives are not necessary and can be used without these two pseudo-directives. But with these two pseudo-instructions, you can add an insurance on the road to ensure adherence to the aapcs, making the aAPCs stack usage conventions slightly easier to follow in actual programming.

When using align= in the segment definition header (that is, the relevant code for the area pseudo-directive), the Align property is used to set the alignment position of the first address of the snippet or data segment, for example, align=3 indicates that the first address of the segment will be arranged at 2^3=8 byte alignment. It is important to note that, in addition to the Align property of area, there is a align instruction with the same name, and the align instruction is used inside the segment to adjust the alignment position of the next command or data in the align instruction.

The PRESERVE8 pseudo-directive does not make any modifications to the stack. There are four ways to use PRESERVE8 pseudo-directives, respectively, where 1 and 2 are equivalent:

1. PRESERVE8

2. PRESERVE8 {TRUE}

3. PRESERVE8 {FALSE}

If not, it is up to the compiler to determine whether the assembly file is identified as the PRES8 property or the ~pres8 property in the compilation process (that is, adding or not adding the pseudo-directive), but the experiment shows that the compiler is not completely reliable in addition to this pseudo-directive ... So it's best to explicitly add PRESERVE8 {TRUE} or PRESERVE8 {FALSE}. So what does this pseudo-directive do?

If you want to tell the assembler to say, "In my assembly file, to ensure that the stack is 8 bytes aligned, and that any of my files are 8-byte aligned at any point in the stack," then you use the PRESERVE8 pseudo-directive in the assembly file to notify the assembler of your guaranteed content. The assembler knows you. The assembly file is a 8-byte alignment player, identifies the file as the PRES8 attribute, and then, if you call a function in your assembly that identifies a file that requires a 8-byte alignment attribute, the connection does not give an error. But if you mark this assembly file as PRESERVE8 {FALSE}, and then you invoke the function in this file that identifies the file that requires 8-byte alignment, the error message is given when the connection is made.

So what is a file that indicates a 8-byte alignment attribute is required? If you have one of the assembly files, some operations must be stack 8 byte alignment, then you need to use the REQUIRE8 pseudo-directive to inform the assembler to identify the file as the REQ8 property, and then this file is called "a file that requires 8-byte alignment attributes."

In a lot of files, calls between files by a large number of cases, through the PRESERVE8 and REQUIRE8, it is possible during the connection by the compiler to check the code we write the damage caused by careless 8-byte alignment module calls that require a 8-byte alignment module (after experimental discovery, the assembly is given a warning , assembly call C is given an error, because C file does not directly use REQUIRE8, so I guess the compiler will all C files are identified as the REQ8 property, so it will be an error.

The use of REQUIRE8 with PRESERVE8

Original: http://www.cnblogs.com/reload/p/3159053.html

CORTEXM 8-byte alignment and keyword PRESERVE8 of the kernel stack