[Country EMBED strategy] [061] [2440LCD Drive design]

LCD initialization

1. Pin initialization

2. Timing initialization

VBPD (vertical back porch): Indicates the number of invalid lines after the vertical sync signal at the beginning of a frame image

VFBD (vertical front porch): Indicates the number of previous invalid lines of the vertical sync signal after the end of a frame image

VSPW (vertical sync pulse width): Indicates the width of the vertical sync pulse, calculated with the number of rows

HBPD (horizontal back Porch): Indicates the number of VCLK between the start of a horizontal sync signal and the beginning of a row of valid data

HFPD (horizontal front Porth): Indicates the number of vclk between the end of a row of valid data and the start of the next horizontal sync signal

HSPW (horizontal sync pulse width): Indicates the width of the horizontal sync signal, calculated with VCLK

LCDCON1:

Clkval=7 vclk=hclk/(clkval+1) Vclk=6.0-7.1mhz Hclk=100mhz

Pnrmode 11

Bppmode 1100

Envid

LCDCON2:

VSPW (pulse width) 4

VBPD (back Proch) 4

VFPD (front Proch) 4

Lineval 319 lineval+1=320

LCDCON3:

HBPD (back Proch) 1

HFPD (front Proch) 14

Hozval 239 hozval+1=240

LCDCON4:

HSPW-14 (left border)

LCDCON5

FRM560 1

Invvline 1

Invvframe 1

HWSWP 1

3. Frame buffer Initialization

2 byte 16bpp per pixel, frame buffer size 240*320*2

1. Allocating Frame buffer space

2. Inform the frame buffer address to the LCD controller

4. Miscellaneous initialization

/********************************************************************* Name: lcd* Author: d* Time: 2015.11.18* function: LCD driver * * * * ****************************************************************//********************************************* Macro Definition ********************************************************************/#define GPCCON (   (* (volatile unsigned long *) 0x56000020)) GPC Group Control Register # define GPDCON ((* (volatile unsigned long *) 0x56000030)//GPD Group Control Register # define GPGCON ((* (* (volatile unsigned L Ong *) 0x56000060))//GPG Group Control Register # define LCDCON1 ((* (volatile unsigned long *) 0x4d000000)//LCD Control 1 Register # define LCDCON2 ((* (volatile unsigned long *) 0x4d000004)//LCD Control 2 Register # define LCDCON3 ((* (volatile unsigned long *) 0x4d000008)//l CD Control 3 Register # define LCDCON4 ((* (volatile unsigned long *) 0x4d00000c)//LCD Control 4 Register # define LCDCON5 ((* (Volatile unsigned lo ng *) 0x4d000010))//LCD Control 5 Register # define LCDSADDR1 ((* (volatile unsigned long *) 0x4d000014)//frame buffer start Address 1 Register # define LCDSA DDR2 ((* (* (vOlatile unsigned long *) 0x4d000018)//frame buffer start Address 2 Register # define LCDSADDR3 ((* (volatile unsigned long *) 0x4d00001c)//frame buffer Start Address 3 Register # define TPAL ((* (volatile unsigned long *) 0x4d000050)//Temp Palette Register # define HIGHT 320//Screen height, vertical#define widt H 240//Screen width, horizontal//lcdcon1 configuration # clkval 7//clkval[17:8]:4 vclk=hclk/((clkval+1) * *) Vclk=6.0-7.1mhz hclk=100  Mhz#define pnrmode 0x3//pnrmode[6:5]:11 TFT lcd#define bppmode 0xC//bppmode[4:1]:1100 bpp for Tft#define ENVID_ON 1//envid[0]:0 Open LCD Output # define Envid_off 0//envid[0]:0 Turn off LCD output//lcdcon2 configuration # vbpd 1//vbpd[31:24]:2-1 Vertical Rear Shoulder # define LINEVAL (HIGHT-1)//lineval[23:14]:240-1 screen height, Corresponds to vertical Display active#define VFPD 1//vfpd[13:6]:2-1 Vertical Front Shoulder # define VSPW//vspw[5:0]:13-1 Vertical Pulse width, corresponding to vertical Blank time//lcdcon3 configuration # define HBPD 1//hbpd[25:19]:2-1 horizontal rear Shoulder # define HOZVAL (WIDTH-1)//hozval[18: 8]:240-1 screen width, corresponds to horizontal display active#define HFPD 1//hfpd[7:0]:2-1 Horizontal FrontShoulder//lcdcon4 Configuration # HSPW//hspw[7:0]:80-1 horizontal pulse width, corresponding to horizontal Blank time//lcdcon5 configuration # define FRM565 1//frm565[11]: 1 5:6:5 format#define invvline 1//invvline[9]:1 HSYNC inverted#define invvframe 1//invvframe[8]:1 VSYNC Inverted#de Fine pwren_on 1//pwren[3]:1 turn on LCD Power # # pwren_off 1//pwren[3]:0 Turn off LCD Power # hwswp 1//hwswp[0]:1 Swap enable//tpal configuration # tpalen_on 1//tpalen[24]:1 enable#define Tpale N_off 0//tpalen[24]:0 Disable#define tpalval 0xFF0000//tpalval[23:16]:red, Tpalval[15:8], green,tpalval[7:0]:blue/********************** Global variable ************************************************************   /unsigned Short lcdbuffer[hight][width]; Frame buffer 320*240*2 byte/********************************************************************* name: init_lcd* function: Initialize LCD display *     /void Init_lcd () {unsigned long lcdbank; LCDSADDR1[29:21] Frame buffer start Address 30:22-bit unsigned long lcdbaseu;    LCDSADDR2[20:0] Frame buffer start address 21:1 bit unsigned long lcdbasel;     LCDSADDR2[20:0] Frame buffer End address 21:1 bit unsigned long offsize;   LCDSADDR3[21:11] unsigned long pagewidth the half character of each line offset;   LCDSADDR3[10:0] Half word per line of bytes//initialization pin Gpccon = 0xAAAAAAAA; Gpc15-gpc8:10 vd[7-0], gpc7:10 Lcd_lpcrevb, Gpc6:10 Lcd_lpcrev, Gpc5:10 Lcd_lpcoe, Gpc4:10 VM, GPC3:10 VFRAME, GPC2:10 V   Line, Gpc1:10 vclk, gpc0:10 lendgpdcon = 0xAAAAAAAA;    Gpd15-gpd0:10 Vd[23-8]gpgcon |= (0x3<<8); Gpg4[9:8]:11 lcd_pwrdn//Initialization Timing LCDCON1 = (clkval<<8) | (pnrmode<<5) | (bppmode<<1) | (envid_off<<0); LCDCON2 = (vbpd<<24) | (lineval<<14) | (vfpd<<6) | (vspw<<0); LCDCON3 = (hbpd<<19) | (hozval<<8) | (hfpd<<0); LCDCON4 = (hspw<<0); LCDCON5 = (frm565<<11) | (invvline<<9) | (invvframe<<8) | (tpalen_off<<3) |      (hwswp<<0);//Initialize frame buffer Lcdbank = ((unsigned long) lcdbuffer>>22) &0x1FF; Remove frame Buffer Address 30:22 Bit Lcdbaseu = ((unsigned long) LcdbuffeR&GT;&GT;1) &0x1FFFFF; Remove frame buffer start address 21:1 bit LCDSADDR1 = (lcdbank<<21) | (lcdbaseu<<0);   Lcdbasel = ((((unsigned long) Lcdbuffer + width*hight*2) (>>1)) &0x1FFFFF; Remove 21 of the end-of-frame buffer address: 1-bit LCDSADDR2 = (lcdbasel<<0); offsize = 0;   PageWidth = WIDTH*2/2; Page width A word is 2 bytes, so multiply by 2, and because the value is half word, divide by 2LCDSADDR3 = (offsize<<11) | (pagewidth<<0);//Turn off the temporary palette Tpal = (tpalen_off<<24);//Turn on the LCD display LCDCON5 |= (pwren_on<<3); LCDCON1 |= (envid_on<<0);} /********************************************************************* Name: clear_lcd* parameter: *none* return: *none* function: Clear Screen * * * * /void CLEAR_LCD () {//Open temporary palette Tpal = (tpalen_on< &LT;24) | (tpalval<<0);}

[Country EMBED strategy] [061] [2440LCD Drive design]