Csapp Reading Notes (3)-Memory Hierarchy

It turns out that memory is regarded as memory, which is not suitable here, or memory is more general. Memory is an indispensable part of the computer architecture, and is a necessary component in the von noriman structure. Common memory in a PC includes registers, high-speed cache (cache on the CPU), primary memory (that is, memory), and disks. In addition, some people include the storage media of remote machines. In this way, the storage hierarchy is formed, as shown in.

This graph is more detailed and divided into six levels, from 0 to 5. From top to bottom are registers, L1 cache, L2 cache, primary storage, disks, and remote storage media. This figure shows the pyramid structure of the memory. The arrow on the left shows that the storage in the pyramid high-end has a high access speed and a higher price, while the storage in the pyramid low-end has a lower access speed and a lower price. Under the balance of these two factors, in a single system, the high-level memory capacity is generally small, while the low-level memory capacity is large.

The following table shows the access speed of each level of storage.

Storage Type	Access speed (based on the clock cycle)
Register	0
High-speed cache	1 ~ 10
Primary Storage	50 ~ 100
Disk	20,000,000
Remote Storage Media	~ = 20,000,000

From the above table, we can see that the speed of the previous steps is almost the same. The biggest difference is that the speed of the disk is N orders of magnitude different from that of the previous steps. This is one of the reasons why the storage hierarchy must exist.

 

 

 

 

 

　　

 

Next we will look at its essence. The registers are closely connected with the CPU, which is not discussed here. From high-speed cache to primary memory, these resources are random access memory (RAM ). Ram is divided into two types: static RAM (SRAM) and dynamic RAM (Dram ). The static and dynamic values here are used to check whether the storage content needs to be dynamically refreshed. In the case of power-on, SRAM does not need to be refreshed, but DRAM needs to use a certain policy to refresh data. (Interestingly, the internal structure is just the opposite. Because of the use of triggers in SRAM for storage, there is always current flow inside it, so it is actually dynamic, while DRAM uses capacitors for storage, it is actually static. In this sense, SRAM consumes more energy than dram. I will not give an example of the ever-changing development of DRAM and the emergence of new products. When I started using my computer, I only saw SDRAM and later DDR. The S of SDRAM indicates synchronous, that is, synchronization. This technology is faster than the asynchronous technology used in its first step. DDR is short for double data-rate synchronous DRAM, that is, double-rate SDRAM. It uses the rising and falling edges triggered by the clock to access data, making it twice faster than SDRAM. As for DDR2 in the future, in addition to the frequency upgrade, ddr3 does not know whether there are any structural changes. In addition, the video memory is different from the common primary memory. Originally, its application needs are different. Graphics cards require greater data throughput for video memory. Therefore, video memory generally supports concurrent read/write operations.

All Ram mentioned above are volatile memory, that is, data persistence requires power supply. The following describes non-volatile memory. It is usually called Rom (read-only memory) and is literally translated as read-only memory. It has been used for many historical reasons. The current Rom is not only readable but also writable. Rom is often used for fixed storage on the motherboard, used to store bios, boot self-check and other basic programs. Later, we developed an EPROM called erasable Rom, which is actually a light erasable Rom. It can be stored for about 1000 times. Recently, EEPROM, also known as the e-square prom, is called an electroerasable Rom. This storage technology is widely used in USB flash drives.

 

 

 

 

 

　　

Let's take a look at the structure of the disk as follows.

 

The upper left is a single disk, and the upper right is the entire disk. Because disks are stored on both sides, the three disks have six surfaces, each of which is composed of a series of concentric circles. a concentric circle is called a track. A track is divided into multiple sectors, each of which stores fixed-capacity data. At this point, there will be a problem, the size of the concentric circles is different, so different channels have different storage capabilities. One way is that the storage capacity of each track is the same regardless of its size. In this way, the closer the track to the outer edge, the more waste (gaps in the figure) there is ). Another way is to group tracks by distance to the center of the circle. The storage capacity of tracks in the same group is the same, which helps reduce waste, but also improves the complexity of disk operations. In either way, gaps must exist. These gaps can be used to implement redundant backup mechanisms to improve the reliability of storage (of course, this is only available for advanced disks ). Here is a bit of nonsense about the disk speed. Usually 5400rpm and 7200 RPM for PCs and 5400 rpm for laptops. This speed does not seem to have been improved. The server may use ephemeral RPM or 15000 rpm disks, and some reliability technologies are used. Consider the disk access speed. As we can see above, the disk access speed is much lower, and the most fundamental reason is that it depends on the movement of the data read/write manipulator. The speed of mechanical movement and the speed of electronic movement are not comparable. Disk access time is generally composed of three parts: track time + disk rotation time + data transmission time. In these three parts of time, the latter two are basically considered as constants for the same disk, and the difference is mainly caused by the former. There is a large gap between the time consumed by different tracing methods. Therefore, various disk access algorithms are generated to optimize the time. Because the disk access speed is slow, the interrupt mechanism and the direct memory access mechanism are used to transmit data between the disk and the primary storage.

The second reason for the existence of the storage hierarchy (that is, the cache structure) is the time and space locality of data access, that is, data access tends to be the same or similar in time and space. However, the quality of time-space characteristics varies with different programs (it is very likely that people write programs with poor time-space characteristics). Therefore, this local principle must be emphasized. Because of this principle, you can put the most recently used data or code in a cache close to the CPU to increase the access rate. The details that need to be paid attention to in specific programming are good for checking the book in real time, which is not necessary as a summary.

 

As for the cache structure, the address segmentation method is generally used for retrieval. The low position indicates the block internal addressing, the middle position indicates the selection of the index, and the high position indicates the tag, which is used for sequential search within the set. It is as follows. In, the location of the SET index can be matched at a time, while inside the set, the matching can only be determined based on the tag value. One problem with multiple tags is what kind of replacement strategy should be used when replacement is required? In L1 cache, a direct ing cache is used, that is, each set contains only one tag. This avoids the problem of replacement policies to simplify the design, and also because the replacement algorithm has little effect on the access speed at that level. General replacement algorithms (such as LRU) are mostly used for primary storage and disks. This chapter contains a lot of content, many of which are not summarized, but the main line is basically covered. For later search.