Cstyle UEFI Introduction: Article 20.0 IGD OpRegion interface & amp; IGD OpRegion PROTOCOL, cstyularefi

Cstyle UEFI Introduction: Article 20.0 IGD OpRegion interface & IGD OpRegion PROTOCOL, cstyleuefi
Acpi igd OpRegion interface is a bridge between IGD driver, OS, and BIOS Using SCI. IGD OpRegion PROTOCOL is the backbone of UEFI BIOS to build a bridge.
Legacy implementation mode:
OpRegion Memory Layout:
The Public ACPI Methods provided in Mailbox1 can find each method in ACPI spec Appendix B Video Extensions. It provides a standard ACPI communication channel for IGD graphics devices. Mailbox2 provides port information on how IGD graphic driver communicates with BIOS through SWSCI. Mailbox3, ASLE (ASL event) Support, This is the mailbox for communicating all driver features related information between the driver and the SBIOS
ASL Storage Register, used to store the IGD OpRegion Header address:
IGD and BIOS communication (SCI ):
SWSCI Register and IGD send SCI to ICH Through DMI to trigger TCOSCI_STS bit in its GPE0 register to trigger the true SCI event, and then process it through the ASL _ Lxx method defined in BIOS, at the same time, the message is transmitted through Mailbox2. It is mainly to pre-fill the corresponding parameters in mailbox, including Function-Code and other information before triggering SCI, and then trigger SCI. In L_xx method, the corresponding fields in mailbox2 will be read, finally, some other fields are used to return the processing result and status. (TCO: total cost of ownership. ref intel EDS) Under the new scheme, rather than writing to the SWSMI bit (bit 0 of the SWSMI registerat offset 0xe0 in the PCI configuration space of the graphics device ), the graphics driverwrites to the SWSCI register (bit 0, offset 0xe8 assuming SWSCI is configured for SCIoperation ). this register serves two purposes: 1) Support selection of SMI or SCI event source (SMISCISEL-bit15) 2) SCI Event trigger (GSSCIE-bit 0) To generate a sw sci event, software (system BIOS/graphics driver) shocould program bit15 (SMISCISEL) to 1. this is typically programmed once (assuming SMIs are nevertriggered ). on a write transition of 0-> 1 of bit 0 of this register, the GMCH sends a single SCImessage down the DMI link to ICH. ICH will set the DMISCI bit in its tcoprocessor STS registerand TCOSCI_STS bit in its GPE0 register, upon refreshing ing this message from DMI. thecorresponding SCI event handler in BIOS is to be defined as an _ Lxx method. once written as 1, software must write a "0" to this bit to clear it. all other write transitions (1-> 0, 0-> 0, 1-> 1) will be ignored. writes will likewise beignored if bit 15 is 0.To generate an sw smi event, software shocould program bit 15 to 0 and trigger SMIthrough writes to SWSMI register (see SWSMI register for programming details ).
Video BIOS Table (VBT) is a bin file generated when we use BMP tool to configure VBIOS/GOP. It will be wrapped in the BIOS rom, in the post process, the BIOS reads data to the memory and keeps up with the various mailboxes (generally, the ASL code, IgdoPRn. the IGD OpRegion table is created by the Asl, which is generally completed by the IGD OpRegion PROTOCOL & ACPI Protocl. The final generated table is read by the video BIOS and device driver, obtains information about the current hardware, including Flat Panel Timings, Generic Mode Timing, GPIO pins, and Clock. The table can be dynamically changed in post based on the user's set value in setup or platformPolicy (the table is saved in EFI_GLOBAL_NVS_AREA-> IgdOpRegionAddress: IgdOpRegion and read by ACPI driver ), to achieve different user customization (refer to IgdOprom. c ).
The PROTOCOL mentioned in IGD OpRegion protocol is the DXE driver used to create IgdOpRegionTable. It provides related information for VBIOS/GOP and IGD driver. It mainly reads the Bin file generated by BMP configuration from FV, the platform policy, and the setup value to customize various system parameters, and assists acpi driver to create acpi table (GNVS-> ASLB ).
Now, we will record it here. For details, refer to ACPI spc, Intel IgdOpRn spc, and related spc.
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