Deep understanding of ARM architecture (cloud6410)-Understanding cloud6410

This series of articles by muge0913 finishing, reprint please note the Source: http://blog.csdn.net/muge0913/article/details/7358731

Chip Architecture

The application processor chip of the 16/32-bit CPU is the-bit CPU used by Samsung. Samsung has released both the-bit CPU and-bit memory, which are based on the arm11 architecture and are compatible with hardware pins, it should be said that the general functions are basically the same. The obvious difference is that has 2D/3D hardware acceleration.

Http://download.csdn.net/detail/muge0913/4144550 (s)

Simple Description:

ARM core:Using the core of the ARM1176JZF-S, including 16 KB command data cache and 16 KB command data TCM, ARM core voltage is 1.1v, can run to 553 MHz, in the case of 1.2v, can run to 667 MHz. The 64/32-bit internal BUS consisting of Axi, AHB and APB is connected to the external module.

Tft LCD controller:The Display Controller supports a TFT 24-bit LCD screen with a resolution of 1024x1024. The Display output interface supports RGB, i80, bt.601 output (yuv422 8bit), and output to TV encoder interfaces. Supports up to five graphic windows and overlay operations. From window0 to window4, different image input sources and different image formats are supported. In fact, the display controller can receive
Buffer and the image data of other modules can overlay these different images and output them to different interfaces, such as LCD and TV encoder.

RTC: The backup battery is supported when the system powers down. An external 32.768khz clock is required. The year, month, day, hour, minute, and second format is BCD format.

PLL: Three plls are supported: apll, mpll, and epll. Apll provides a clock for arm to generate armclk. mpll provides a clock for all Modules connected to Axi/AHB/APB to generate hclk and pclk. epll provides a clock for special peripherals and generates sclk.

Timer/PWM: Five 32bit timers are supported. timer0 and timer1 have PWM functions, while timer2 and 3,4 have no output pins, which are internal timer.

Watchdog: Watchdog, which can also be used as a 16-bit Internal timer.

I2S: Used to transmit audio data with external audio codec. Supports common I2S dual channels and 5.1 I2S transmission. The audio data can be 8/16/32bit and the sampling rate ranges from 8 kHz to 192 kHz.

I2C: Two I2C controllers are supported.

UART: Supports four UART ports, DMA and interrupt modes. uart0/1/2 also supports the irda1.0 function. UART speed up to 3 Mbps.

Gpio: Universal gpio port, function reuse.

IRDA: Independent IrDA controller, compatible with irda1.1, supports the Mir and fir modes.

SPI: Supports full-featured SPI.

Modem: Modem interface controller. The built-in 8 kb SRAM is used to exchange data with the external modem. This SRAM can also provide the boot function for the modem.

USB OTG: Supports usb otg 2.0 and slave and host functions at a maximum speed of 480 Mbps.

USB Host: An Independent USB host controller that supports USB Host 1.1.

MMC/SD: SD/MMC controller, compatible with SD host 2.0, SD memory card 2.0, sdio card 1.0, and high-speed MMC.

PCM audio: Supports two PCM audio interfaces to transmit single-channel 16-bit audio data.

Ac97: The ac97 Controller supports independent PCM stereo audio frequency input, single-channel mic input, and PCM stereo audio frequency output. It is connected to audio codec through the ac-Link Interface.

Post processor: Image Processing Module, similar to the TV scaler module. The maximum input image size is 4096x4096, and the maximum output image size is 2048x2048. The conversion between RGB and YUV is supported.

JPEG codec: Supports JPEG encoding/decoding. the maximum size is 4096x4096.

2d graphics: 2D acceleration. Supports image point/line, bitblt, and color expansion.

3D graphics: 3D acceleration.

Reference: http://blog.csdn.net/nanjianhui/article/details/4163792