Design and implementation of Ethernet optical wireless communication system

The history of optical communication with light wave as information carrier is a long-standing one, the atmospheric laser communication is the communication of the atmosphere as the transmission medium, and it is the first kind of communication method developed after the laser appears. Because it has the advantages of long-distance transmission distance, frequency bandwidth, small transmitting antenna, good confidentiality and electromagnetic interference, more and more attentions are paid to it, and the application is becoming more and more widely.

Ethernet is the most widely used networking technology, which has many advantages such as high reliability, large media information, easy to expand and update, and has been widely used in enterprises, schools and other fields. According to IEEE802.3 Ethernet standard specification, Ethernet per section coaxial cable length must not exceed 500m, through repeater interconnection, the network maximum distance also must not exceed 2.8km. In this case, the use of laser wireless communication technology, beyond the regional limits of Ethernet, to meet the needs of data communication, has a strong application value.

1 Ethernet-based laser wireless communication system

The combination of Ethernet and laser wireless communication can give full play to the advantages of the two systems and improve the application range and reliability of the system greatly. Fig. 1 is a schematic diagram based on one end of the Ethernet laser wireless communication system, and the other end of the structure and the end of the symmetrical state. From the computer network card out of the bipolar MLT-3 data signal, by the RJ45 interface, after the coupling transformer, into a single polarity level signal, sent to the Ethernet transceiver, the resulting high-speed pecl signal through the modulation drive circuit to the laser direct intensity modulation, driving laser light-emitting, A laser containing information is emitted through an optical antenna. The receiving end optical antenna gathers the laser signal to the photosensitive tube, recovers the pecl high speed data signal after receiving the demodulation circuit, and then sends the coupling transformer to the computer, thus completes the entire communication process. From Fig. 1, the system consists of three parts: Ethernet transceiver, modulation drive circuit and receiver Demodulation Circuit. The following is a detailed description of the three parts of the circuit design. (Computer science)

2 Ethernet Transceiver Circuit

The Ethernet transceiver circuit consists of a RJ45 interface, a coupling transformer, an Ethernet transceiver, and an interface between the transceiver and the modulation drive circuit and the receiving demodulation circuit. The Ethernet transceiver is the core unit, which directly determines the operating performance of the system.

2.1 Ethernet Transceiver IP113

The system uses IC plus company produced Ethernet to optical fiber transceiver IP113 chip. The IP113 is a two-port (including TP port and FX port) 10/100mbps Ethernet integrated switch consisting of a two-port switching controller and two Ethernet fast transceivers. Each transceiver complies with IEEE802.3, ieee802.3μ, ieee802.3x rules. Preserves Ssram for frame buffers, can store 1K byte MAC addresses, full digital adaptive adjustment and timing recovery, baseline drift correction, working at 10/100base TX and 100baseFX Full-duplex/Half-duplex mode. Using 2.5v single power supply, 25MHz single clock source, 0.25μm process, 128 foot PQFP package.

Figure 2 is a IP113 internal schematic diagram. IP113 work in store-and-forward mode, the rate of PORT1 (TP port) is the result of adaptive adjustment, so no additional memory is required to buffer the packet. Each port has its own receive buffer management, launch buffer management, launch queue management, launch Mac and receive Mac. Each port shares a hash unit, a Memory interface unit, an empty buffer manager, and an address table. The hash unit is responsible for locating and identifying the address. Launch buffer management and receive buffer management is responsible for storing data or reading data through the memory interface. The launch Mac and the receiving MAC are responsible for the various protocol controls over Ethernet. The receiving MAC receives the data from the transceiver, is placed in the receiving FIFO, and receives the buffer management for the data transfer request. When receiving buffer management receives the request, an empty storage block is obtained from the empty buffer area and the packet is written through the Memory interface unit. The receiving packet also enters the hash cell. The hash cell finds the address from the packet to create the Address table. IP113 determines whether to forward or discard packets based on the Address table. Two ports share an empty buffer management, after reset, empty buffer management provides two addresses of empty storage area. When a packet is received, a new empty store is found, and the corresponding store is released when a packet is forwarded.

2.2 Ethernet Transceiver Circuit design

The Ethernet transceiver circuit is shown in Figure 3. Mainly by Ethernet transceiver Chip IP113, special configuration chip EEPROM 93c46, LED display matrix, and IP113 PORT1 and TP module, PORT2 and FX module interface between the components.