Design and Implementation of secondary bootloader of the TMS320C6000 Series

Design and Implementation of secondary bootloader of the TMS320C6000 series: microprocessor and DSP |
Source: electronic engineer | Author: Xie Shiyi Li yongchao

Introduction

With the extensive application of DSP (Digital Signal Processor) systems, the program scale is also expanding. the boot-loader of the chip itself is used to guide the DSP program through flash memory, it is often restricted by the program size and structure. For example, the program is much larger than the manufacturer's fixed boot range, and the impact of different locations of the interrupted vector table on the boot jump of the program, etc, therefore, more flexible guidance is needed.

After the system is powered on, the boot program directs the DSP application from this memory to the high-speed memory (such as internal SRAM and SDRAM) on the DSP application board. Flash Memory has the function of deleting electrical signals, fast deletion speed, and high integration. Therefore, it has become the first choice for this type of memory. Because the access speed of flash memory is slow, the program written into flash memory will be loaded to the fast memory by DSP during system power-on. This process is called boot loader. Different DSPs have different boot methods. Taking TI's TMS320C6000 series chips as an example, there are three kinds of self-raising methods: No boot, and the CPU directly starts to execute

Host boot. After the system is reset, the host initializes the DSP storage space through the CPU's HPI (main program design interface; in Rom Boot, the DMA controller copies the address 0 of a fixed-length program from the cel space and starts execution from the address 0. For 620x/670x DMA, copy 64 KB data from cel to address 0; For 621x/671x edma, copy 1 KB data from cel address to address 0.

The secondary bootloader of C6000 chip of TI has been introduced in many documents, including the PLL of secondary bootloader, the setting of EMIF and the setting of moving Table and the burning and Writing Process of flash memory, however, there is little literature on the Implementation of secondary bootloader with an interrupt vector table. Taking the high-performance DSP of TI corporation as an example, this paper introduces a new method of secondary bootloader with interrupt vector table, this provides a new idea for the development of the TMS320C6000 series DSPs. This method is applied in practice, and the system runs stably and reliably.

　1 second bootload Process

Tms320c6713 is TI's latest floating point DSP of the tms320c67xx series. Tms320c6713 can execute 8 32-bit commands each cycle. It supports 32/64-bit data, and has a maximum running speed of 225 MHz and 1800 MIPS (Millions of operations per second) or 1350 mflops (Millions of floating point operations per second) processing capability; strong peripheral support capability; emip (external memory interface) the 16-bit ehpi interface can be easily connected to synchronous and asynchronous memory such as SDRAM, sbsram, flash memory, and SRAM. In addition, the 16-bit ehpi interface can be used with various processor interfaces, there are also optimized multi-channel cache serial ports and multi-channel audio serial ports. These external interfaces allow designers to easily implement their own application systems.

When the romboot mode is selected, after the reset changes from low to high, the CPU kernel of c6713 is reset, while other parts of c6713 start to work, in this case, the cel space of EMIF is automatically configured as the 8/16/32-bit asynchronous memory interface according to the ROM boot mode, and the read/write time sequence of the cel space is automatically configured as the maximum, then copy the first 1 kb of the cel space to the address 0x0000 0000. This 1 KB data is used to guide other programs. The interrupt vector table is set to 0x0000 0000 ~ For programs at 0x0000 and 0400, the 1 KB data contains the EMIF setting code and the migration program, which must also contain the interrupt vector table. This article focuses on the bootloader process with an interrupt vector table. The starting address of the interrupt vector table is 0x00000000. If the program length is less than 1 kb, the second bootloader is not required, but the program length is usually greater than 1 kb. Therefore, the second bootloader is an inevitable process.

The implementation of the second bootloader requires the introduction of EMIF settings and migration programs, namely writing boot_c671x_2.s62, c6713_emif.s62, lnk2.cmd and boot. cmd3 files. This article describes the program for implementing multi-channel buffer serial port, and shows the process block 1 for implementing secondary bootload.

Call the debug user program project file mebsp_test.pjt as a routine, and then introduce three files in this project file.

After the program is compiled, three important files should be introduced; The EMIF value definition file (c6713_emif.s62); The EMIF setting and data migration program (boot_c67lx_2.s62 ); CMD configuration file (lnk2.cmd ). At the same time, the original McBSP. CMD file should be removed. Figure 2 shows a comparison. Figure 2 (a) is the original program, and Figure 2 (B) is the program that generates the data to be written. In Figure 2 (B), three files are added to the original McBSP. CMD removed. Boot_c67lx_2.s62 is common, and c6713_emif.s62 needs to configure EMIF parameters based on the actual chip.

 

Boot_c671x_2.s62 contains the. boot_load function, which contains several procedures, as shown in 3. The c6713_emif.s62 file contains several EMIF parameter configurations. The configuration of the ink2.cmd file bit coff.

 

The second step is to use the tool hex6x.exe that comes with the ccsdevelopment environment to convert the *. Out file generated by the project into hex format. In the DOS environment, the command is> hex6x.exe boot. cmd.

Finally, according to the requirements of the flash memory chip, burn the Hex file to the address specified in the flash memory. In this example, the AM29LV800BB-70ecFlash memory chip is fully compatible with the JEDEC Standard, and supports system programming, users only need to write command sequences to their internal command registers to perform some erasure, all erasure, and data writer functions. Meanwhile, they can provide hardware and software methods to check the operation execution of flash memory. First, you need to erase all the chips to 0 xFFFF, and then burn them. Because the flash memory is accessed in 16 bits, the physical address of the flash memory is edited in 16 bits, the logical address used in the program is compiled in bytes. The relationship between the two is as follows: Logical Address = physical address <1, so there is an address offset in the program. The program to be burned is given below.

 

2. Implementation of secondary bootloader with an interrupt vector table

Section 1st describes the general secondary bootload process. However, when you need a boot program with an interrupt vector table, you must carefully program the three important files. Otherwise, unexpected consequences may occur.

2.1 configuration file ink2.cmd

Ink2.cmd has a slight difference, and there is an interrupted vector table at this time. Therefore, the allocation space of vectors should be considered during allocation. The differences in the configuration file are mainly in memory. The section is as follows:

Sections

The memory differences are as follows:

A) Some programs that do not consider interrupt vector table Configuration:

B) Some programs considering interrupt vector table Configuration:

. Vectors are the interrupt vector table, which has data of 0x200 length. They must be placed at the address of 0x90000000 and followed by. boot_load.

2.2 interrupt vector table file Vec. ASM

Another important thing is the change in the VEC. ASM file in Figure 2. During program debugging, the interrupt vector table starts to jump directly to c_int00. However, the first 1 kb of data to be written must be set and moved to EMIF, so it points to a change.

Some vecter. ASM programs are as follows:

A) Some vecter. ASM programs of the original program:

B) vecter. ASM part of the program that generates bootload data:

In the above program, program a) starts to point to c_int00, and program B) to point to _ boot, that is, the population of. boot_load. This is because after the 1 kb program is copied, the program starts to run. First, execute the secondary boot program, that is, the entry point _ boot. After completing the secondary boot, execute the Normal C Language Environment Code initialization, and then jump to the user main function. The generated. OUTFILE is converted to writable data through hex6x.exe.

2.3 configuration file boot. CMD for Data Conversion

With hex6x.exe, the boot. Out file can be converted to boot. HEX to facilitate writing to flash memory. At this time, the boot. CMD program also needs to change accordingly, and convert the program of the interrupt vector table to the same program as the. boot_load program, program segment, and data segment.

The boot. CMD configuration program is as follows:

A) the boot. CMD configuration of the interrupt vector table is not considered:

B) consider the boot. CMD configuration of the interrupt vector table:

If you use hex6x.exe boot. CMD to convert the program length, a warning is displayed. In this case, you can view the map file and check the space occupied by the program and data to determine the Len size, as long as the Len is greater than the actual program length. Romwidth depends on the number of digits in the flash memory used. If it is 8 bits, it will write 8; if it is 16 bits, it will be changed to 16. In the above program, program B) is different from program a) that the. vectors is added, so that the 0x0000 0000 address in the generated boot. HEX file is the vectors program. The *. HEX file generated at this time can be burned to flash.

3 conclusion

Taking TI's high-performance DSP TMS320C6000 series chip as an example, this paper introduces a new method of secondary bootloader with an interrupt vector table guided by flash memory, specifically, the difference in the part of the bootloader program that needs to be rewritten is described in detail, which provides a new idea for the development of the TMS320C6000 series DSP. This method is simple and feasible. On the documents provided by TI, you only need to make some modifications to get the correct results. This method has been applied in actual projects and has stable system performance. Generally, the first address of the interrupt vector table is 0x0000. If the interrupt vector table is not set to 0x0000 0000, set istp in the boot_c671x_2.s62 file, at this time, vectors do not need to be placed in 1 kb of data, but point to the initial address of vectors in 1 kb of space.