Detailed CPU and Norflash circuit Connection diagram and how it works

1. The reason why a bit is staggered when the CPU Address line is connected to the Nandflash Address line:

A: The CPU sends an address corresponding to one byte of data, while the nandflash One address corresponds to two bytes of data,

cpu Knowing which byte data you want to read, it sends the corresponding address to nandflash nandflash is 16 bit,

therefore Nandflash always return every time 2 bytes of data, at this time by a CPU on-Chip Nandflash Controller will CPU the data that you want to pass to CPU .

Similarly, if the nandflash, the Address line connection should be staggered two bits.

Question 2, address line, data line is usually more than one device, so how to access the target device without affecting other devices?

A: Each device has its own chip-select PIN, each of which corresponds to a piece of address space,

The CPU sends the address to the device controller, and the device controller automatically selects the device on the bus based on the address range.

The unchecked device does not work and will not be affected.

Detailed CPU and Norflash circuit Connection diagram and how it works