Directx11 tutorial (14) d3d11 pipeline (3)

Now let's start learning some CP (command processor) knowledge. References:

Http://fgiesen.wordpress.com/2011/07/01/a-trip-through-the-graphics-pipeline-2011-part-3/

CP (command processor) should be the front-end block of GPU. It extracts the command Packet Generated by UMD from the command buffer in video memory, such as status setting and drawindex, then translate them into specific operations of the GPU backend block and send these operations to the specific block.

Because of the extended video memory duration, a large FIFO should be included in the CP to cache command packet. The portion used to parse and schedule command should be a state machine, the simple CP flowchart is as follows:

From the tutorial in the previous chapter, we know that command packet mainly exists in the ring buffer or the indirect buffer to which it points, therefore, the prefetcher module in CP extracts the command packet from the memory and stores it in the FIFO. Then, the decode module is responsible for parsing the command packet, the scheduling module then sends the command to the specific 3D block or CS block for execution. After the command is executed by the 3D block or CS block, the execution signal must be sent to the sync/Wait module of CP, finally, the information is sent to the driver.

Next, I drew a simple command processor based on my own understanding: