Docking analysis of STM32 FSMC bus and TFT8080 Interface _ communication protocol

1. FSMC Protocol Analysis

The following is the protocol for the ILI9325 8080 interface

It can be seen from the diagram that the protocol of the 8080 interface is: The first issue of the signal, and then issued a command to enable or data to enable the signal, after the completion of the data, in the reading and writing signal on the rise along the write data or read data.

CS (Chip selection Signal): Low-level tablet selection is effective, high level failure (default is High: Failure)

RS (Data/command): Low level Write command, high level write data (default is high: Write data) FSMC defaults to low ....

RD (read signal): Low level effective, rising along write data, high level failure (default high, failure)

WR (Write signal): Low level effective, rising along write data, high level failure (default is high, failure)

FSMC write SRAM mode as follows:

FSMC for class RAM memory read operation process is generally: first send out the slice of the signal, read and write signal and address signal, and then wait for the data to be completed, read data on the bus or write data to the external device.

Through the above analysis, we will find that this FSMC write NOR timing is very similar to the 8080 interface timing, they have the slice of the signal, read the signal, write letter number, data bus, and their work process is the same, then we can use the following way to connect the 8080 interface with the FSMC interface,

(1) Read operation

(2) Write operation

Through the above analysis, we will find that this FSMC write NOR timing is very similar to the 8080 interface timing, they have a slice of the signal, read signal, letter number, data bus, but to the 8080 interface and the FSMC interface completely docking there is still a problem unresolved, That's 8080 protocol. No address signal line and FSMC has 16 address signal, 8080 protocol according to a high and low level of the port to distinguish between the data signal and command signal, we can think about, we can choose the 16 address line of any one as the command/data selection lines, This means that when the address line is high, the data is transmitted, and the low level indicates that the transmission is the command.