[Documentation]. Amy electronics-use signed numbers

ArticleDirectory

• 1 Overview
• 2 The number of symbols in the Verilog-1995
• 3 The number of symbols in the Verilog-2001

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Content 1 Overview

In a digital circuit, we can use the unsigned number, that is, a set of 0 and an integer. We can also use the signed number, that is, a set of 0 and a positive number. In a more complex system, we may use these two types of numbers.

The signed number is usually expressed in the 2's complement form. Figure 1 lists the positive and negative numbers corresponding to the four-digit binary notation. Further observation, we found that the addition and subtraction of the two types of numbers are the same. addition and subtraction are performed by turning around the positive clock on several rounds or by Reverse clock. For example, if the value is 1001 + 0100, it means that four locations are moved from 1001 to 1101 in the direction of the time, and the result is. In the unsigned number type, it represents (+ 9) + (+ 4) = + 13; in the signed number type, it represents (-7) + (+ 4) =-3. From the perspective of several rounds, if the result obtained by addition overflows, it means it crosses the critical point of several rounds. Note that this critical point is different for the unsigned number and the signed number: the unsigned number is between 1111 and 0000; the signed number is between 0111 and 1000.

The behavior of physical addition and subtraction is similar to that of several rounds of movement. As long as all the operations and results have the same bit width, the form of signed or unsigned number can be used for the same circuit. For example, if both a, B, and sum are eight-bit signals, the expression

 
Sum = A + B;
 

No matter whether these signals are translated into signed or unsigned numbers, they reference the same hardware and use the same binary notation. This phenomenon is also true in other arithmetic operations (but it cannot be used in non-arithmetic operations, such as rational number operations or overflow sign generation ).

Figure 1 four-digit binary data Wheel

In addition, when the bitwise width of the operator or its result is different, we need to identify which type of symbol it uses. Because different symbol types require different extensions. For the unsigned number, a zero prefix is called the zero-extended bit. For the signed number, N so-called symbol extended bits are required. For example, the 4-bit binary value-5 is 1011. When it is extended to 8 bits, it should be changed to 1111_1011 instead of 2017_1011.

For example, set a and sum to eight-bit signals, and B to four-bit signals, that is, b3b2b1b0. Expression

 
Sum = a + B
 

B needs to be extended to 8 bits. In the form of unsigned numbers, B is extended to ipv_b3b2b1b0; in the form of signed numbers, B is extended to b3b3b3b3_b3b2b1b0. The hardware referenced by the above expression includes a bit width extended circuit and a divider. Because the expansion circuit is different for the number of symbols and the number of unsigned. Therefore, the above expression uses different hardware for the number of characters and the number of unsigned characters.

2 The number of symbols in the Verilog-1995

In the Verilog-1995, only integer data types are transferred to signed numbers, while Reg and wire data types are transferred to unsigned numbers. Since the integer type has a fixed 32-Bit Width, It is not flexible. We usually manually add extended bits to implement the number of existing symbols. The followingCodeThe fragment describes the operation of the number of signed and unsigned numbers:

Reg [] a, B; Reg [] C, Reg [] sum1, sum2, sum3, sum4 ;... // same width. can be applied to signed and unsignedsum1 = a + B; // automatica 0 extensionsum2 = A + C; // Manual 0 extensionsum3 = a + {4 {1 'b0 }, c}; // Manual sign extensionsum4 = a + {4 {C [3]}, c };
 

In the first statement, A, B, and sum1 have the same Bit Width. Therefore, whether translated into a signed number or an unsigned number, they all reference the same amplifier circuit.

In the second statement, the Bit Width of C is only 4. In addition, its bit width is adjusted. Because the reg type is treated as an unsigned number, the front of C is automatically placed in the 0 extension bit.

In the third statement, we manually add four zeros to C to achieve the same effect as the second expression.

In the fourth statement, we need to translate the variable into a signed number. To implement the required behavior, C must extend the symbol bit to 8 bits. There is no other method, so you have to manually scale it out. In the code, we repeat the maximum bits of C four times (4 {C [3]}) to create 8 bits with extended symbol bits.

3 The number of symbols in the Verilog-2001

In the Verilog-2001, signed forms are also extended to Reg and wire data types. Haha, A New Keyword signed can be defined as follows:

 
Reg Signed [7:0] A, B;
 

With the signed data type, the code described in section 2nd can be rewritten:

Reg Signed [] a, B; Reg Signed [] C; Reg Signed [] sum1, sum4 ;... // same width. can be applied to signed and unsignedsum1 = a + B; // automatic sign extensionsum4 = A + C;
 

The first statement will reference a conventional calculator because a, B, and sum1 share the same bit width.

In the second statement, all right-hand variables have the signed data type, and C is automatically extended to 8 characters. Therefore, you do not need to manually add symbols.

In a small digital system, we can usually choose the number of signed or unsigned numbers. However, in some large systems, subsystems of different forms are included. It is a weak type language. Non-conforming variables and signed variables can be mixed in the same expression. According to the verilof standard, the extension symbol bit is executed only when all right-hand variables have signed data type attributes. Otherwise, all variables are extended by only 0. Consider the following code snippet:

 
Reg Signed [] A, sum; Reg Signed [] B; Reg [] C;... Sum = A + B + C;
 

Because C does not have the signed data type attribute, the extended bits of the right-hand variables B and C are 0.

There are two system functions, $ signed and $ unsigned (), which are used to convert the expressions in parentheses to the signed and unsigned data types. For example, we can convert the Data Type of C,

 
Sum = a + B + $ signed (C );
 

Now, all variables on the right hand side have signed data type attributes, So B and C will expand the symbol bit.

In complex expressions, mixing signed and unsigned data types introduces some subtle errors, so you should avoid mixing them. If necessary, the expression must be simple and a universal conversion function must be used to ensure data type consistency.

Reference

1 Pong P. Chu. FPGA prototyping by Xilinx examples: Xilinx Spartan-3 version. Wiley

See also

[Study FPGA/FPGA with Amy]. [logical experiment document serialization plan]