[Documentation]. Amy electronics-using functions in synthesis

ArticleDirectory

• 1 Overview
• 2. Example

Reader's assumptions

Mastered:

• Programmable Logic Basics
• Base on OpenGL
• Verilog us II Getting Started Guide designed with OpenGL
• ModelSim Getting Started Guide designed with OpenGL

Content 1 Overview

Some expressions may appear many times in the OpenGL module. To avoid repeated InputCodeWe can abstract the commonly used part into a routine, and the functions in the module can achieve this. One or more input parameters of the function in Tilde. Only a single value is returned. During integration, the function is expanded to map to the corresponding hardware. Therefore, for comprehensive consideration, the function should be simple and can be used as a thumbnail for some complex expressions. The basic function syntax is as follows:

 
Module ...... // function defined within modulefunction [result_type] [func_id] ([input_arg]); begin [statement] endendfunction... endmodule
 

The function must be defined in the function and endfunction qualifiers. Optional [result_type] specifies the type of the returned value. The reg or Integer type with a range is often used. [Input_arg] is used to declare the input parameter. [func_id] is used to specify the function name. The result returned by the function through an expression, as shown in figure

 
[Func_id] = ...;
 

2. Example

In the binary counter section, we discuss the Modulo-M counter. There are two parameters: M, specifying the Count range is [0, M-1]; N, specifying how many bits of m need to be stored, the value is greater than or equal to log2 (m). The value of N should not be an independent parameter. It is better to define a local constant and then calculate its value within the module. You can use the function. The modified code is as follows:

Module mod_m_bin_counter # (Parameter M = 10) // mod-M (// global clock and Asyn reset input CLK, input rst_n, // Counter Interface output max_tick, output min_tick, output [N-1: 0] Q); // signal declarationlocalparam n = log2 (m); // Number of BITs in counterreg [N-1: 0] r_reg; wire [N-1: 0] r_next; // body // registeralways @ (posedge CLK, negedge rst_n) if (! Rst_n) r_reg <= 0; else r_reg <= r_next; // next-state logicassign r_next = (r_reg = (M-1 ))? 0: r_reg + 1 'b1; // output logicassign q = r_reg; assign max_tick = (r_reg = (M-1 ))? 1 'b1: 1' B0; assign min_tick = (r_reg = 0 )? 1 'b1: 1' B0; // log2 constant functionfunction integer log2 (input integer N); integer I; begin log2 = 1; for (I = 0; 2 ** I <n; I = I + 1) log2 = I + 1; endendfunction endmodule
 

The log2 () function defined in the module is used to obtain the value of the local variable n. Since the function has been computed in the pre-processing, the function does not reference any physical circuit.

Reference

1 Pong P. Chu. FPGA prototyping by Xilinx examples: Xilinx Spartan-3 version. Wiley

See also

[Study FPGA/FPGA with Amy]. [logical experiment document serialization plan]