Driver Analysis for transplantation of S3C2440 nand flash to S3C2410 [1]

The transplantation of the S3C2440A nand flash Driver to the S3C2410 is still somewhat different. The main two IC's nand flash registers are somewhat different. See the differences between the two below:

//// Copyright (c) Microsoft Corporation.  All rights reserved.////// Use of this source code is subject to the terms of the Microsoft end-user// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.// If you did not accept the terms of the EULA, you are not authorized to use// this source code. For a copy of the EULA, please see the LICENSE.RTF on your// install media.////------------------------------------------------------------------------------////  Header: s3c2410x_nand.h////  Defines the NAND controller CPU register layout and definitions.//#ifndef __S3C2410X_NAND_H#define __S3C2410X_NAND_H#if __cplusplus    extern "C"     {#endif//------------------------------------------------------------------------------//  Type: S3C2410X_NAND_REG    ////  NAND Flash controller register layout. This register bank is located //  by the constant CPU_BASE_REG_XX_NAND in the configuration file //  cpu_base_reg_cfg.h.//typedef struct  {    UINT32  NFCONF;             // configuration reg    UINT8   NFCMD;              // command set reg    UINT8   pad1[3];            // pad     UINT8   NFADDR;             // address set reg    UINT8   pad2[3];            // pad     UINT8   NFDATA;             // data reg    UINT8   pad3[3];            // pad    UINT32  NFSTAT;             // operation status reg    UINT32  NFECC;             // error correction code 0} S3C2410X_NAND_REG, *PS3C2410X_NAND_REG;    #if __cplusplus    }#endif#endif 

The above code is the S3C2410A register. Let's look at the address description of the S3C2440A register:

//// Copyright (c) Microsoft Corporation.  All rights reserved.////// Use of this source code is subject to the terms of the Microsoft end-user// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.// If you did not accept the terms of the EULA, you are not authorized to use// this source code. For a copy of the EULA, please see the LICENSE.RTF on your// install media.////------------------------------------------------------------------------------////  Header: s3c2440a_nand.h////  Defines the NAND controller CPU register layout and definitions.//#ifndef __S3C2440A_NAND_H#define __S3C2440A_NAND_H#if __cplusplus    extern "C"     {#endif//------------------------------------------------------------------------------//  Type: S3C2440A_NAND_REG    ////  NAND Flash controller register layout. This register bank is located //  by the constant CPU_BASE_REG_XX_NAND in the configuration file //  cpu_base_reg_cfg.h.//typedef struct  {    UINT32  NFCONF;             // configuration regUINT32  NFCONT;    UINT8  NFCMD;              // command set reg    UINT8d0[3];    UINT8 NFADDR;             // address set reg    UINT8d1[3];    UINT8  NFDATA;             // data reg    UINT8d2[3];UINT32  NFMECCD0;UINT32  NFMECCD1;    UINT32  NFSECCD;        UINT32  NFSTAT;             // operation status regUINT32  NFESTAT0;UINT32  NFESTAT1;    UINT32  NFMECC0;             // error correction code 0    UINT32  NFMECC1;             // error correction code 1UINT32  NFSECC;UINT32  NFSBLK;    UINT32  NFEBLK;             // error correction code 2} S3C2440A_NAND_REG, *PS3C2440A_NAND_REG;    #if __cplusplus    }#endif#endif 

There is a big difference between the two. Therefore, the difficulty of porting is mainly the ECC part, and some register bit addresses are also different and need to be modified, as shown below:

//  Use Macros here to avoid extra over head for c function calls#define READ_REGISTER_BYTE(p)(*(PBYTE)(p))#define WRITE_REGISTER_BYTE(p, v)(*(PBYTE)(p)) = (v)#define READ_REGISTER_USHORT(p)(*(PUSHORT)(p))#define WRITE_REGISTER_USHORT(p, v)(*(PUSHORT)(p)) = (v)#define READ_REGISTER_ULONG(p)(*(PULONG)(p))#define WRITE_REGISTER_ULONG(p, v)(*(PULONG)(p)) = (v)

The above code can be used no matter whether it is S3C2410 or S3C2440. These two parts are the same when I port them. Of course, there are not many changes in the registers of S3C2443 and S3C2450, but the nand flash Driver of the S3C2450 BSP still has a great change. Let's analyze it later. Now we should analyze this, WINCE5.0. I have not migrated WINCE6.0. I usually like to transplant it myself, so that I can have a deep understanding of the WINCE process and be more familiar with this IC. Let's see the difference between the two.

Register macro definition of S3C2440A:

//  MACROS#define NF_CE_L()WRITE_REGISTER_USHORT(pNFCONT, (USHORT) (READ_REGISTER_USHORT(pNFCONT) & ~(1<<1)))#define NF_CE_H()WRITE_REGISTER_USHORT(pNFCONT, (USHORT) (READ_REGISTER_USHORT(pNFCONT) | (1<<1)))#define NF_CMD(cmd)WRITE_REGISTER_USHORT(pNFCMD, (USHORT) (cmd))#define NF_ADDR(addr)WRITE_REGISTER_USHORT(pNFADDR, (USHORT) (addr))#define NF_DATA_R()READ_REGISTER_BYTE(pNFDATA)#define NF_DATA_W(val)WRITE_REGISTER_BYTE(pNFDATA, (BYTE) (val))#define NF_DATA_R4()READ_REGISTER_ULONG(pNFDATA)#define NF_DATA_W4(val)WRITE_REGISTER_ULONG(pNFDATA, (ULONG) (val))#define NF_STAT()READ_REGISTER_USHORT(pNFSTAT)#define NF_MECC_UnLock()WRITE_REGISTER_USHORT(pNFCONT, (USHORT) (READ_REGISTER_USHORT(pNFCONT) & ~(1<<5)))#define NF_MECC_Lock()WRITE_REGISTER_USHORT(pNFCONT, (USHORT) (READ_REGISTER_USHORT(pNFCONT) | (1<<5)))#define NF_RSTECC()WRITE_REGISTER_USHORT(pNFCONT, (USHORT) (READ_REGISTER_USHORT(pNFCONT) | (1<<4)))#define NF_WAITRB(){while(!(NF_STAT() & (1<<1))) ;}#define NF_CLEAR_RB()WRITE_REGISTER_USHORT(pNFSTAT, (USHORT) (READ_REGISTER_USHORT(pNFSTAT) | (1<<2)))#define NF_DETECT_RB(){while(!(NF_STAT() & (1<<2)));}#define NF_ECC()READ_REGISTER_ULONG(pNFECC)

Register macro definition of S3C2410A:

//  MACROS#define NF_CE_L()WRITE_REGISTER_USHORT(pNFCONF, (USHORT) (READ_REGISTER_USHORT(pNFCONF) & ~(1 << 11)))#define NF_CE_H()WRITE_REGISTER_USHORT(pNFCONF, (USHORT) (READ_REGISTER_USHORT(pNFCONF) | (1 << 11)))#define NF_CMD(cmd)     WRITE_REGISTER_USHORT(pNFCMD, (USHORT) (cmd))#define NF_ADDR(addr)   WRITE_REGISTER_USHORT(pNFADDR, (USHORT) (addr))#define NF_DATA_R()     READ_REGISTER_USHORT(pNFDATA)#define NF_DATA_W(val)WRITE_REGISTER_BYTE(pNFDATA, (BYTE)(val))#define NF_STAT()       READ_REGISTER_USHORT(pNFSTAT)#define NF_RSTECC()WRITE_REGISTER_USHORT(pNFCONF, (USHORT) (READ_REGISTER_USHORT(pNFCONF) | (1 << 12)))#define NF_WAITRB(){while(!(NF_STAT() & (1<<0))) ;}#define NF_DETECT_RB(){while(!(NF_STAT() & 0x01));}#define NF_ECC()READ_REGISTER_ULONG(pNFECC)

The registers of S3C2410 are the registers I have modified. The main differences are as follows:NF_CE_L (), NF_CE_H (), NF_RSTECC (), NF_WAITRB (), NF_DETECT_RB (),These registers can be separated by detailed descriptions on Datasheet. I will not explain it in detail here! Register modification is the first step to transplant the nand flash Driver. It is also the most important step. The next step is to analyze the precautions for driver porting.
Not complete ......