DS18B20 Timing Analysis Detailed steps

　　

Huaqing Vision Lecturer

650) this.width=650; "src=" http://s2.51cto.com/wyfs02/M02/7E/B6/wKioL1cHe0rDDnwdAABH16zblY0817.jpg "title=" 1.jpg " alt= "Wkiol1che0rddnwdaabh16zbly0817.jpg"/>

1, the process 1, 2 is the initialization process, each read to initialize, otherwise 18b20 in standby state, unable to read successfully. Procedure 1: Pull down the signal line 480-700US, make it reset, then release the bus 15-60us,18b20 will pull down the bus 60-240us, then it releases the bus. So one sign of success in initialization is the ability to read 18B20, the first low-to-high operation sequence.

(Note: The black section represents the host operation, the blue part represents the 18b20 operation, and each time the host operation is completed waiting for the 18B20 state, the bus must be released, such as setting the IO to a high impedance state or something.) Otherwise 18b20 can't write the status to the line)

2, Process 3, 4 is to write 1bit data process. Procedure 3 is write 0, process 4 is write 1. Procedure 3: Pull down the bus 60us, then raise the bus 5us, complete. Procedure 4: Pull down the bus 5us, then raise the bus 60us, complete

3, Process 5, 6 is to read the 1bit process. Procedure 5 is read 0, process 6 is read 1. Procedure 5, 6: Pull down the bus 5us, then release the bus, read the bus, if 0, read in 0, if 1, then read into 1.

Ds18b20 Timing

Initialization sequence--reset and presence pulses

All communication from the DS18B20 is initiated by an initialization sequence consisting of a reset pulse. The initialization sequence is emitted by the host, followed by the presence pulse (presence pulse) emitted by the ds18b20. (Fig. 13, that is, the following) illustrates this point. The DS18B20 notifies the host that it is on the bus and is ready to operate when a pulse of the presence of the answer reset pulse is issued.

　　

650) this.width=650; "src=" http://s1.51cto.com/wyfs02/M02/7E/BA/wKiom1cHerTQaPAnAAA3T-XXMwE254.jpg "title=" 2.jpg " alt= "Wkiom1chertqapanaaa3t-xxmwe254.jpg"/>

During the initialization step, the host on the bus generates a reset pulse by pulling down the single bus at least 480μs. The bus host then releases the bus and enters the receive mode.

When the bus is released, the 5kω pull-up resistor pulls the level on the single bus back to the high level. When the DS18B20 detects a rising edge, it waits 15 to 60us and then emits a pulse in the way that the bus 60-240us is pulled down.

As the documentation describes, the host pulls the bus down by a minimum of 480US and then releases the bus. Due to the effect of the 5kω pull-up resistor, the bus reverts to a high level. The DS18B20 detects a rising edge and waits 15 to 60us to emit the presence pulse: Pull down the bus 60-240us. At this point, initialization and presence sequencing are complete.

The reset functions written according to the above requirements are:

The first is the delay function: (because the DS18B20 delay is in 15us units, so write a delay unit of 15US delay function, note: The following delay function crystal is 12MHz)

/*

************************************

Function: Delayxus_ds18b20

Function: Ds18b20 delay function

Parameter: T is timing time length

return: None

Description: Delay formula: 15n+15 (approximate), crystal oscillator 12Mhz

******************************************

*/

void Delayxus_ds18b20 (unsigned int t)

{

for (t;t>0;t--)

{

_nop_ (); _nop_ (); _nop_ (); _nop_ ();

}

_nop_ (); _nop_ ();

}

Delay function disassembly code (easy to analyze delay formula)

c:0x0031 7f01 MOV R7, #0x01

c:0x0033 7E00 MOV R6, #0x00

c:0x0035 1206a6 lcall Delayxus (C:06A6)

38:void delayxus_ds18b20 (unsigned int t)

39: {

40:for (t;t>0;t--)

C:0X06A6 D3 Setb C

C:0x06a7 EF MOV A,R7

C:0x06a8 9400 Subb A, #0x00

C:0X06AA EE MOV A,R6

C:0x06ab 9400 Subb A, #0x00

C:0X06AD 400B JC c:06ba

41: {

£ _nop_ (); _nop_ (); _nop_ (); _nop_ ();

C:0X06AF-NOP

C:0x06b0-NOP

C:0X06B1-NOP

C:0X06B2-NOP

43:}

C:0X06B3 EF MOV A,R7

C:0X06B4 1F DEC R7

C:0X06B5 70EF jnz delayxus_ds18b20 (C:06A6)

C:0x06b7 1E DEC R6

C:0x06b8 80EC sjmp delayxus_ds18b20 (C:06A6)

: _nop_ (); _nop_ ();

C:0X06BA-NOP

C:0X06BB-NOP

45:}

C:0X06BC RET

Analyzing the disassembly code above, we know that the delay formula is 15* (t+1)

/*

************************************

Function: Rst_ds18b20

Function: Reset Ds18b20, read the presence Pulse and return

Parameters: None

Return: 1: Reset succeeded; 0: Reset failed

Description: Pull down the bus at least 480us, can be used to detect ds18b20 work is normal

******************************************

*/

Bit Rst_ds18b20 ()

{

Bit ret= "1";

dq=0;/* Low Bus */

Delayxus_ds18b20 (32);/* For insurance purposes, delay 495US */

dq=1;/* release the bus, the DS18B20 detects the rising edge and sends the presence pulse */

Delayxus_ds18b20 (4);/* need to wait for 15~60US, where the delay of 75us can be guaranteed to accept the presence of pulses (if the communication is normal) */

RET=DQ;

Delayxus_ds18b20 (14);/* delay 495us, let Ds18b20 release the bus, avoid affecting the next operation */

dq=1;/* Release Bus */

return (~ret);

}

Write timing:

The host writes data to the DS18B20 at the write time slot and reads the data from the DS18B20 in the read time slot. Only one bit of data is transmitted per timeslot on a single bus.

Write-time gap

There are two kinds of write time slots: write "0" when the Gap and write "1" time slot. The bus host uses write "1" when the gap is written to Ds18b20 logic 1, using write "0" when the gap to Ds18b20 write logic 0. All write-time slots must have a minimum of 60us duration, and two write-time slots must have a minimum of 1us recovery time. Both write-time slots are generated by pulling the bus down through the host (see illustration 14).

　　

650) this.width=650; "src=" http://s1.51cto.com/wyfs02/M00/7E/B6/wKioL1cHe3ehnpi5AAB2fvMxP2s668.jpg "title=" 3.jpg " alt= "Wkiol1che3ehnpi5aab2fvmxp2s668.jpg"/>

To generate a write 1 o'clock Gap, the host must release the bus within the 15μs after pulling down the bus. After the bus is released, the bus reverts to a high level due to the effect of the 5kω pull-up resistor. To generate a write 0 o'clock Gap, the host must continue to pull down the bus to meet the time slot duration requirement (at least 60μs) after pulling down the bus.

After the host generates a write-time slot, the DS18B20 will sample a single bus within a time window of 15 to 60us thereafter. In the sampled time window, if the bus is high, the main opportunity writes to Ds18b20 1, and if the bus is low, the master Ds18b20 writes 0 to the.

As documented, all write-time slots must have at least 60us of duration. Two adjacent write-time slots must have a minimum of 1us recovery time. All write-time slots (write 0 and write 1) are generated by pulling down the bus.

In order to generate a write-1 o'clock Gap, the host must release the bus within 15us after pulling down the bus (the low level will last at least 1us). Due to the effect of the pull-up resistor, the bus level reverts to high until the write time slot is complete.

To generate a write-0 o'clock Gap, the host continuously pulls down the bus after pulling down the bus until the write time slot is complete and the Bus is released (Duration 60-120us).

When the write time slot is generated, the DS18B20 will sample the bus within 15 to 60us of the generated time to determine whether to write 0 or write 1.

The write functions that meet the above requirements are:

/*

************************************

Function: Wr_bit

Function: Write a data to Ds18b20

Parameter: I is the bit to write

return: None

Description: Bus from high pull to low generation write timing

******************************************

*/

void Wr_bit (Bit i)

{

dq=0;//Generating Write timing

_nop_ ();

_nop_ ();//Bus pull-down duration is greater than 1us

dq=i;//write data, 0 and 1 are available

Delayxus_ds18b20 (3);//delay 60US, wait for Ds18b20 sample read

dq=1;//Release Bus

}

/*

***********************************

Function: Wr_byte

function: Ds18b20 write byte function, write the lowest bit first

Parameter: DAT is the byte data to be written

return: None

Description: None

******************************************

*/

void wr_byte (unsigned char dat)

{

unsigned char i= "0";

while (I++<8)

{

Wr_bit (dat&0x01);//write from lowest bit

dat>>=1; Be careful not to write dat>>1

}

}

Read Time series:

DS18B20 data is sent to the host only after a read-time slot is issued by the host. Therefore, after the Read register command [BEh] or read power command [B4H] is issued, the host must immediately generate a read-time slot to DS18B20 provide the required data. In addition, the host can generate a read time slot after issuing the temperature conversion command T [44h] or recall command e 2[b8h] to understand the state of the operation (explained in detail in the section Ds18b20 operation instructions).

All read-time slots must have a minimum duration of 60us. Two consecutive read slots must have a minimum of 1us recovery time. All read-time slots are generated by pulling down the bus, continuing at least 1us and then releasing the bus (the bus reverts to a high level due to the pull-up resistor). After the host generates a read-time slot, the DS18B20 starts sending 0 or 1 to the bus. The DS18B20 allows the bus to remain high by sending 1 in a way that pulls down the bus to send 0. When sending 0, the DS18B20 will release the bus at the end of the read time slot, and the bus will be pulled back to high level by the pull-up resistor (also the bus idle state). The DS18B20 output data is valid after 15us after the falling edge (The falling edge produces a read time slot). Therefore, the host release bus and the sampling bus and other actions to be completed within the 15μs.

Figure 15 shows the time of the TRC (rising Edge) and Tsample (host sampling bus) for the read time slot, Tinit (low-level duration after falling edge), and within 15μs.

Figure 16 shows how to maximize the system time allowance: let Tinit and TRC as short as possible, the host sampling bus to 15μs this time period of the tail.

　　

650) this.width=650; "src=" http://s3.51cto.com/wyfs02/M00/7E/BA/wKiom1cHetrS4xvaAABrIedQvHA858.jpg "title=" 4.jpg " alt= "Wkiom1chetrs4xvaaabriedqvha858.jpg"/>

As the document shows, DS18B20 can only send data to the host when the host is issuing a read-time slot. Therefore, the host must generate a read-time slot immediately after the BE command, B4 command, to enable DS18B20 to provide the appropriate data. Also, after the 44 command, the B8 command will generate a read time slot.

All read-time slots must have a minimum duration of 60us. Two consecutive read slots must have a minimum of 1us recovery time. All read-time slots are generated by pulling down the bus, continuing at least 1us and then releasing the bus (the bus reverts to a high level due to the pull-up resistor). DS18B20 output data is valid after 15us after the falling edge is generated. Therefore, the release bus and the host sampling bus and other actions to be completed within 15us.

The functions that meet the above requirements are:

/*

***********************************

Function: Read_bit

Function: read one data to Ds18b20

Parameters: None

return: Bit I

Description: Bus from high pull to low, sustained to more than 1us, and then release the bus for high-level idle state to generate read time series

******************************************

*/

unsigned char read_bit ()

{

unsigned char ret;

dq=0;//Pull Low Bus

_nop_ (); _nop_ ();

dq=1;//Release Bus

_nop_ (); _nop_ ();

_nop_ (); _nop_ ();

The ret=dq;//read time slot generates 7 us after reading the bus data. The read action of the bus is placed behind the 15us time limit to ensure the validity of the data read.

Delayxus_ds18b20 (3);//delay 60US to meet the time-length requirements of the read time slot

dq=1;//Release Bus

return ret; Returns the data read to

}

/*

************************************

Function: Read_byte

Function: Ds18b20 read a byte function, first read the lowest bit

Parameters: None

Return: Read a byte of data

Description: None

******************************************

*/

unsigned char read_byte ()

{

unsigned char i;

unsigned char dat= "0";

for (i=0;i<8;i++)

{

dat>>=1;//first read the lowest bit

if (Read_bit ())

dat|=0x80;

}

return (DAT);

}

/*

************************************

Function: Start_ds18b20

Function: Start temperature conversion

Parameters: None

return: None

Description: Write 44H command after reset

******************************************

*/

void Start_ds18b20 ()

{

Dq=1;

Rst_ds18b20 ();

Wr_byte (0XCC);//Skip

Wr_byte (0x44);//Start temperature conversion

}

/*

************************************

Function: Read_tem

Function: Read temperature

Parameters: None

return: type int temperature data, high eight bits for high eight bit temperature data, low eight bits for low eight bit temperature data

Description: Write be command after reset

******************************************

*/

int Read_tem ()

{

int tem= "0";

Rst_ds18b20 ();

Wr_byte (0XCC);//Skip

Wr_byte (0xbe);//Issuing Read command

Tem=read_byte ();//read out temperature low eight bit

tem|= ((int) read_byte ()) <<8);//readout temperature high eight bits

return tem;

}

Note: DS18B20 Official document does not indicate the order of reading and writing data bits, check the information, Ds18b20 read and write data are from the lowest bit read and write.

>>> more Excellent technology blog in Huaqing Vision Embedded College

DS18B20 Timing Analysis Detailed steps