DTS configuration for PCI bus of PowerPC

During this period of time, we need to get the debugging and driver development work related to PCI Express. The old rule is that we should first look for information on the Internet. This kind of stuff is quite rare and we have already bought a book, I plan to summarize it by myself. This article describes how to configure the PCI bus in PowerPC.

PowerPC uses a mechanism called FDT flat device description tree to pass to kernel hardware configuration parameters to guide the kernel. This advantage is that PowerPC Linux basically modifies DTS files, and the workload for upgrading the kernel is much less than that of other CPU architectures.

However, the information about FDT or open firmware is insufficient. Here we record the ranges parameters of the PCI bus tree that I understand.

pci0: pci@e0008500 {interrupt-map-mask = <0xf800 0 0 7>;interrupt-map = </* IRQ5 = 21 = 0×15, IRQ6 = 0×16, IRQ7 = 23 = 0×17 *//* IDSEL AD14 IRQ6 inta */0×7000 0×0 0×0 0×1 &ipic 0×12 0×8/* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */0×7800 0×0 0×0 0×1 &ipic 0×13 0×8>;interrupt-parent = <&ipic>;interrupts = <66 0×8>;bus-range = <0×0 0×0>;ranges = <0×02000000 0×0 0×90000000 0×90000000 0×0 0×100000000×42000000 0×0 0×80000000 0×80000000 0×0 0×100000000×01000000 0×0 0×00000000 0xe0300000 0×0 0×00100000>;sleep = <&pmc 0×00010000>;clock-frequency = <66666666>;#interrupt-cells = <1>;#size-cells = <2>;#address-cells = <3>;reg = <0xe0008500 0x100        /* internal registers */0xe0008300 0×8>;        /* config space access registers */compatible = “fsl,mpc8349-pci”;device_type = “pci”;};

This is a DTS configuration file of the mpc8379. Some attributes are well understood:
PCI @ e0008500 indicates that the base address of this PCI Controller register ing is e0008500
Reg = <0xe0008500 0x100/* internal registers */
0xe0008300 0x8>;/* config space access registers */
It is proved that the base address of the register ing of the PCI Controller is e0008500, and the base address of the register ing used in the read configuration space is 0xe0008300, followed by a length of 8 bytes. That is, the register _addr and register _data registers.

Ranges is used to describe the ing between the CPU address space and the PCI address space.
For the e300 kernel, a set of configurations consists of six 32-bit hexadecimal notation.

ranges =<0×02000000 0×0 0×90000000 0×90000000 0×0 0×100000000×42000000 0×0 0×80000000 0×80000000 0×0 0×100000000×01000000 0×0 0×00000000 0xe0300000 0×0 0×00100000>;

There are three groups. The first 32-digit number at the beginning indicates the property of the mapped address. 0x0000000 indicates Io ing, 0x02000000 indicates memory ing, and 0x42000000 indicates memory ing. prefetch is supported.
The second-to-second dual-character represents the address space of the PCI bus. Two dual-characters are used because the PCI bus may support 64-bit addressing.
4th dual-words indicate CPU _ address, that is, the CPU memory domain address space, which is the space for CPU addressing. The e300 is a 32-bit CPU. If it is an e500 kernel, two dual-characters are required.
5-6 double characters indicate the ing Length

Kernel startup message

mpc837x_rdb_setup_arch()Found FSL PCI host bridge at 0x00000000e0008500. Firmware bus number: 0->0PCI host bridge /pci@e0008500 (primary) ranges:MEM 0×0000000090000000..0x000000009fffffff -> 0×0000000090000000MEM 0×0000000080000000..0x000000008fffffff -> 0×0000000080000000 PrefetchIO 0x00000000e0300000..0x00000000e03fffff -> 0×0000000000000000

Exactly match.

Pay attention to the CPU memory domain address space when allocating the configuration space. Do not repeat the CPU memory domain address space of other devices.