Electronic Design provincial competition-007 (Dead Zone Time)

// April 17, 2014

// "Not completed" is entered on January 1, June 20, 2014"

// June 21, 2014

There are two solutions: Dual timer and single Timer

Senior Student indicates that the dual timer output waveform is not good, or the single timer is good.

The principles are as follows:
Use a sine wave and a triangle wave ratio to measure the width of the sine wave.

MCU detailed work:
Tim1

Triangle wave: select central alignment mode for Dir

Sine Wave: An array is used to implement a sine wave.

Arr: Set to carrval, which determines the frequency of the output waveform.

CCR1: we change it to change the duty cycle.

Change CCR1: every time the ARR of the counter is completed, there is an interruption when updating (we use up_iqr). At this time, the sine wave array is assigned to CCR1.

Note: The sine wave array must be enlarged to match the ARR.

Void spwm_configuration (void) {tim_timebaseinittypedef tim_baseinitstructure; tim_ocinittypedef tim_ocinitstructure; tim_bdtrinittypedef tim_bdtrinitstructure; gpio_inittypedef gpio_initstructure; /*************************************** **************************************** /rcc_apb2periphclockcmd (rcc_apb2periph_gpioa | rcc_apb2periph_gpiob | rcc_apb2periph_afio | rcc_apb2periph_tim1, enable ); /*********************** gpio *************** **************************************** * /// pa.8: oc1 output port of tim1 gpio_initstructure.gpio_pin = gpio_pin_8; outputs = outputs; outputs = gpio_speed_50mhz; gpio_init (gpioa, & gpio_initstructure); // set the pb.13 port to timerech1n and timerech2n output ports; outputs = gpio_pin_13; outputs = outputs; gpio_init (gpiob, & gpio_initstructure ); /********************** PWM frequency = 72000/(360*200) = 1 kHz ************************************* * **************** // set the basic counter of tim1 (set the PWM frequency) // frequency = timereclk/(ARR + 1) tim_baseinitstructure.tim_period = 199; duration = 359; duration = 0; duration = duration; duration = 0; tim_timebaseinit (tim1, & tim_baseinitstructure ); tim_arrpreloadconfig (tim1, enable); // tim1-> CR1 = 0x00b1; tim1-> Cr2 = 0x0200; /************************* set the duty cycle ************ **************************************** **/tim_ocinitstructure.tim_ocmode = tim_ocmode_pwm1; required = tim_outputstate_enable; required = tim_outputnstate_enable; required = tim_ocpolarity_high; // output polarity required = tim_ocnpolarity_high; // complementary output polarity tim_ocinitstructure.tim_pulse = 150; // timerepulse sets the pulse value to be loaded to the capture ratio register /************************* ** multi-channel commands ***************************/tim_oc1init (tim1, & tim_ocinitstructure); // enable the shadow register of The CCR1 register (the setting is changed only when an update event is generated) tim_oc1preloadconfig (tim1, tim_ocpreload_enable); tim1-> CCR1 = 0x0100; tim1-> arr = carrval; ********** **************************************** **/tim1-> CR1 & = 0x00ff; // configure the clock division factor tdts = tck_int = 72 m frequency = tim_ossrstate_enable; frequency = tim_ossistate_enable; tim_bdtrinitstructure.tim_locklevel = tim_locklevel_off; frequency = 0x90; // adjust the dead zone size here 0-0xff break = tim_break_disable; break = tim_breakpolarity_high; break = tim_automaticoutput_enable; tim_bdtrconfig (tim1, & tim_bdtrinitstructure ); /*************************************** **************************************** /tim_itconfig (tim1, tim_it_update, enable); // tim1-> Dier = 0x0001; // tim1 enables tim_cmd (tim1, enable); // tim1_oc channel outputs PWM (must be added) tim_ctrlpwmoutputs (tim1, enable );}

Electronic Design provincial competition-007 (Dead Zone Time)