Execution logic and process of simple JTAG burning and writing programs

Execution logic and process of simple JTAG burning and writing programs

This article is excerpted from Wang honghui's book "Practical Guide for developing embedded Linux kernel (ARM platform )".

 

There are many simple JTAG burning and writing programs on the Internet, which are written in standard C, Vc, windows, and Linux, you can download the package and re-compile it with appropriate modifications.
Regardless of the version of the program, the basic principle and the execution logic should be similar. The accompanying CD of this book contains the complete source code of the program I downloaded, modified, and used in JTAG burning, for more information, see. 10-6 shows the overall process of the program.
The burning Program maintains two scan linked list buffers, one corresponding to the input and one corresponding to the output. A scan chain buffer is an integer array of int type. The length of the array is the number of pins of the CPU. Each element in the array corresponds to the status of a pin, there are only two States for a pin: 0 or 1. In fact, one digit can be used to describe these two States. It is a waste to describe these two States with an int integer in the program, interested readers can modify and optimize the program. The input scan linked list array is used to save the status of each pin that has just been scanned from the CPU, and the output scan linked list array is used to save the status of the pin that will be scanned to the CPU.
To compile a flash chip, you must first erase the flash chip and then perform write operations on it. To erase the flash chip, you can erase the flash chip one by one or the entire chip at a time, for the time series and commands for flash chip wiping, see Datasheet of the specific flash chip model.
The flash chip Data Reading and writing through the simple JTAG cable must be read and written in bytes one by one. The operation process is similar. Taking flash as an example, the operation process is as follows:
1) write the security status of each CPU pin to the output scan linked list array;
2) scan the "sample" command to the CPU's TAP controller;
3) scan the status in the output scan linked list array to the CPU's TAP controller;
4) scan the "sample" command to the CPU's TAP controller again;
5) scan the "extest" command to the CPU's TAP controller;
6) execute the for loop to read data byte by byte. The number of cycles is equal to the length of the data to be read: Write the address pin status of the flash Address to the element corresponding to the output scan linked list array, then, the status in the output scan linked list array is scanned to the CPU's TAP controller, and the status of the CPU pin is synchronized to the input scan linked list array, then extract the flash data from the input linked list array.