Experience in designing super-strong PCB cabling with schematic diagram (transferred from the Electronic Engineering album to the blog of hundreds of millions of homes)

In today's fiercely competitive battery power supply market, designers often use dual Panels due to cost restrictions. Despite its significant advantages in dimensions, noise, and performance, the multi-board (Layer 4, layer 6, and Layer 8) solution has prompted engineers to rethink their wiring strategy and adopt dual panels. In this article, we will discuss the correct use and incorrect use of the Automatic wiring function, the design strategy of the current circuit when there is no ground plane, and the suggestions on the layout of the dual-panel components.


Advantages and disadvantages of Automatic wiring and precautions for Analog Circuit Wiring
When designing a PCB, you often want to use Automatic wiring. Generally, it is no problem to use automatic cabling for digital circuit boards (especially low signal levels and low circuit density. However, when designing analog, hybrid signals, or high-speed circuit boards, if you use an Automatic wiring tool for cabling software, some problems may occur, or even serious circuit performance problems may occur.

For example, Figure 1 shows the top layer of a dual-Panel designed for automatic cabling. The underlying layer 2 of this double panel shows the circuit schematic 3A and Figure 3b of these cabling layers. When designing this hybrid signal circuit board, the device is manually placed on the board to separate the numbers from the simulator.

When using this wiring scheme, you need to pay attention to several aspects, but the most troublesome thing is grounding. If the ground wire is laid on the top layer, all the devices on the top layer are grounded through the wiring. The device is still grounded at the bottom layer, and the ground wire at the bottom layer is connected through the middle hole at the far right of the circuit board. When we check this wiring policy, we first find that there are multiple local loops. In addition, the underlying ground return path is partitioned by the horizontal signal line. The merits of this grounding scheme are that the simulator (12-bit A/D converter mcp3202 and 2.5v mcmcp4125) are placed on the rightmost side of the circuit board, this layout ensures that no digital signals pass through these analog chips.

Figure 3A and Figure 3B show the manual cabling of the circuit 4 and figure 5. Some general design principles should be followed to ensure correct circuit implementation during manual cabling: the ground plane should be used as the current circuit as much as possible; the simulated ground plane and the digital ground plane should be separated; if the ground plane is partitioned by signal cabling, in order to reduce interference to the ground current loop, the signal cabling should be perpendicular to the ground plane. The analog circuit should be placed close to the edge of the circuit board as much as possible, the digital circuit should be placed close to the power connection end as much as possible. This can reduce the DI/dt effect caused by the digital switch.

The two dual panels are deployed on the ground plane at the bottom layer, which is used to facilitate engineers to solve the problem and quickly understand the wiring of the circuit board. The vendor's demonstration board and evaluation board usually adopt this wiring strategy. However, a more common practice is to deploy the ground plane on the top of the circuit board to reduce electromagnetic interference.

Figure 1 use automatic cabling as the top layer of the circuit board designed in the circuit schematic diagram shown in Figure 3

Figure 2 use automatic cabling as the bottom layer of the circuit board designed in the circuit schematic diagram shown in Figure 3

Figure 3A Diagram 1, Figure 2, figure 4, and figure 5 wiring diagram

Figure 3b Diagram 1, Figure 2, figure 4, and figure 5 schematic diagram of the analog circuit for cabling
Current Circuit Design with or without a ground plane

Pay attention to the following basic items for the current loop:

1. If you use strip, try to bold it.

If the Grounding Connection on the PCB is to be considered, the design should be as rough as possible. This is a good rule of thumb, but you must know that the minimum width of the ground wire is the valid width from this point to the end. Here the "end" refers to the farthest point from the power connection end.

2. Ground loop should be avoided

3. If the ground plane cannot be used, a star connection policy should be adopted (see figure 6)

In this way, the local current independently returns to the power connection end. Figure 6 shows that not all devices have their own circuits, and U1 and U2 share the same circuit. You can follow the following 4th and 5th rules.

4. Digital current should not flow through the simulator

When a digital device is switched, the digital current in the circuit is quite large, but it is only instantaneous. This phenomenon is caused by the effective inductance and impedance of the ground. The calculation formula is V = LDI/dt for the inductance of ground plane or ground strip, where V is the generated voltage and L is the inductance of ground plane or ground strip, di is the current change of digital devices, and DT is the duration. The formula for calculating the effect on the ground impedance is V = Ri, where V is the generated voltage and R is the ground plane or ground line impedance, I is the current change caused by digital devices. The voltage changes on the ground plane or ground line of the simulator change the relationship between the signal and ground (that is, the ground voltage of the signal) in the signal chain ).

5. High-speed current should not flow through low-speed Devices

Similar to the above, the ground return signal of a high-speed circuit also changes the voltage of the ground plane. The formula for calculating the interference is the same as above. It is used for the inductance of ground plane or ground strip, V = LDI/dt, And the impedance of ground plane or ground strip, V = Ri. Similar to digital current, when the ground plane or ground line of the high-speed circuit passes through the simulator, the voltage changes on the ground will change the relationship between the signal and ground in the signal chain.

Figure 4 Use manual cabling as the top layer of the circuit board designed in the circuit schematic diagram shown in Figure 3

Figure 5 the bottom layer of the circuit board designed in the circuit schematic diagram shown in Figure 3 using a manual cabling

Figure 6 if the ground plane cannot be used, the "star" wiring strategy can be used to process the current loop.

Figure 7 the ground planes separated by each element are sometimes more effective than the consecutive ground planes. Figure B) the ground wiring strategy is more ideal than figure)

6. No matter what technology is used, the grounding circuit must be designed as the minimum impedance and the capacity resistance.

7. If the ground plane is used, separating the open ground plane may improve or reduce the circuit performance. Therefore, exercise caution when using the ground plane.

Effective Method 7 for separate analog and digital ground planes

In Figure 7, the precision analog circuit is closer to the plug-in, but is isolated from the switch current of the Digital Network and power supply circuit. This is a very effective method for isolating the grounding circuit. We have also used this technology for cabling in Figure 4 and figure 5 discussed earlier.

 

Schematic diagram (II)

The increasing number of digital designers and digital circuit board design experts in the engineering field reflects the development trend of the industry. Although the emphasis on digital design has brought about a major development of electronic products, it still exists, and there will still be some circuit design with analog or realistic environment interfaces. There are some similarities between analog and digital cabling strategies. However, for better results, simple circuit Cabling Design is no longer the optimal solution due to different cabling strategies. In this paper, the similarities and differences between analog and digital wiring are discussed in aspects such as bypass capacitor, power supply, ground line design, voltage error, and electromagnetic interference (EMI) caused by PCB wiring.
Similarities between analog cabling and digital cabling

Bypass or decoupling Capacitor

During cabling, both the simulator and digital devices require these types of capacitors, which are connected to a capacitor near the power supply pin. The capacitance value is usually 0.1mf. Another type of capacitor is required for the power supply side of the system. Generally, the capacitance value is about 10mf.

The position 1 of these capacitors is shown. The capacitance value ranges from 1/10 to 10 times of the recommended value. However, the pin must be shorter and as close as possible to the device (for the 0.1mf capacitor) or power supply (for the 10mf capacitor ).
Adding a bypass or decoupling capacitor to a circuit board and the position of these capacitors on the board are common sense for digital and analog design. But interestingly, the reason is different. In analog wiring design, the bypass capacitor is usually used for high-frequency signals on the bypass power supply. If no bypass capacitor is added, these high-frequency signals may enter the sensitive analog chip through the power supply pin. Generally, the frequency of these high-frequency signals exceeds the capability of the simulator to suppress high-frequency signals. If the bypass capacitor is not used in the analog circuit, noise may be introduced into the signal path, and more serious situations may even cause vibration.

Figure 1 in analog and digital PCB design, bypass or decoupling capacitance (1mf) should be placed as close as possible to the device. The power supply decoupling capacitor (10mf) should be placed at the power cord entrance of the circuit board. In all cases, the pins of these capacitors should be shorter.

Figure 2 using different routes to deploy the power cord and ground wire on the circuit board. Due to this improper combination, the electronic components and lines of the circuit board are more likely to be subject to electromagnetic interference.

Figure 3 in this single panel, the power cords and ground wires of the devices on the board are close to each other. The matching ratio of the power cord and Ground Wire in this circuit board is appropriate in Figure 2. The possibility of electromagnetic interference (EMI) on electronic components and lines in the circuit board is reduced by 679/12. 8 times or about 54 times.

Decoupling capacitors are also required for digital devices such as controllers and processors, but for different reasons. One function of these capacitors is to use them as a "micro" charge library. In a digital circuit, switching the door status usually requires a large amount of current. When switching, the chip generates switching transient current and flows through the circuit board, it is advantageous to have additional "standby" charge. If there is not enough charge during the switch operation, the power supply voltage will change greatly. If the voltage changes too much, the digital signal level may enter an uncertain state, and the state machine in the digital device may run incorrectly. The switching current that flows through the circuit board may cause voltage changes. The circuit board wiring has parasitic inductance. The following formula can be used to calculate the voltage change: V = LDI/dt

Among them, V = voltage variation; L = circuit board line inductance; DI = current variation flowing through the line; dt = current variation time.

Therefore, it is better to apply a bypass (or decoupling) capacitor at the power supply or at the power pins of the active device for multiple reasons.

The power cord and ground wire must be laid together.

The power cord works well with the ground wire to reduce the possibility of electromagnetic interference. If the power cord and ground wire are not properly matched, a system loop is designed and noise may occur. Example 2 of PCB design with improper power cords and ground wires is shown.

On this circuit board, the designed loop area is 697cm2 square meters. Using the method shown in figure 3, the possibility of generating voltage in the loop from the Radiant Noise on or outside the circuit board can be greatly reduced.


Differences between analog cabling and digital cabling

The ground plane is a problem

The basic knowledge of circuit board wiring is applicable to both analog circuits and digital circuits. A basic empirical criterion is the use of an uninterrupted ground plane, which reduces the DI/dt (changes in current at any time) effect in digital circuits, this effect will change the potential of the ground and bring the noise into the analog circuit. The cabling skills for numbers and analog circuits are basically the same, except for one thing. Another point of attention should be paid to the analog circuit, that is, to keep the loop in the digital signal line and ground plane away from the analog circuit as much as possible. This can be achieved through the following method: Connecting the analog ground plane to the system ground connection end separately, or placing the analog circuit at the far end of the electrical circuit board, that is, the end of the line. This is done to minimize the external interference on the signal path. This is not required for digital circuits. digital circuits can tolerate a large amount of noise on the ground plane without any problems.

Figure 4 (left) isolates the digital switch action from the analog circuit and separates the number of the circuit from the analog part. (Right) Separate the high frequency and low frequency as much as possible, and connect the high frequency components to the circuit board.

Figure 5 deploy two adjacent cables on the PCB to easily form parasitic capacitors. Due to the existence of this capacitor, the rapid voltage changes on one line can generate current signals on the other line.

Figure 6 if you do not pay attention to cabling, cabling in the PCB may generate line inductance and mutual inductance. This parasitic inductance is very harmful to the circuit operation that contains a digital switch circuit.

Component position

As mentioned above, in each PCB design, the noise part of the circuit and the "quiet" part (non-noise part) must be separated. Generally, digital circuits are "rich" in noise and are not sensitive to noise (because digital circuits have a large voltage and noise margin). On the contrary, analog circuits have much lower voltage and noise margins. Among them, analog circuits are most sensitive to switch noise. In the cabling of the hybrid signal system, the two circuits must be separated, as shown in figure 4.

Parasitic components produced by PCB design

Two fundamental parasitic components that may cause problems are easily formed in PCB design: parasitic capacitance and parasitic inductance. When designing a circuit board, placing two wires close to each other produces parasitic capacitance. You can do this: place a line above another line on different two layers, or place a line next to another line on the same layer, as shown in Figure 5. In these two cabling configurations, one line voltage may change over time (dv/dt) to generate current on the other line. If the other strip is highly impedance, the current generated by the electric field is converted to voltage.

Fast voltage transient occurs most often on the digital side of analog signal design. If the strip of a transient voltage is close to the high-impedance analog strip, this error will seriously affect the accuracy of the analog circuit. In this environment, analog circuits have two disadvantages: their noise tolerance is much lower than that of digital circuits, and high-impedance cabling is common.

Using one of the following two technologies can reduce this phenomenon. The most common technique is to change the size between wires based on the capacitance equation. The most effective dimension to be changed is the distance between two wires. It should be noted that the variable D is in the denominator of the capacitor equation, and the increase of D reduces the capacity. Another variable that can be changed is the length of two wires. In this case, the length of L is reduced, and the resistance between two strip is also reduced.

Another technique is to strip the ground between the two wires. The ground line is low-impedance, and adding such another line will weaken the electric field that produces interference, as shown in Figure 5.

The principle of parasitic inductance in a circuit board is similar to that of parasitic capacitance. It is also to deploy two wires. In different two layers, place one strip on the top of the other, or place one strip on the same layer next to the other, as shown in figure 6. In the two cabling configurations, the current of a route changes over time (DI/dt). Due to the inductance of this route, the voltage is generated on the same route; due to mutual inductance, proportional current is generated on the other route. If the voltage change on the first line is large enough, interference may reduce the voltage tolerance of the digital circuit and generate an error. This phenomenon occurs not only in digital circuits, but also in digital circuits because of the large instantaneous switching current.

To eliminate potential noise from electromagnetic interference sources, it is best to separate the "quiet" analog line and the noise I/O port. To achieve low-impedance power supply and local network, we should minimize the inductance of digital circuit wires and minimize the capacitance coupling of analog circuits.


Conclusion

Once the number and analog range are determined, careful cabling is critical to successful PCB placement. The wiring strategy is usually introduced as an empirical guideline, because it is difficult to test the final success of a product in a laboratory environment. Therefore, although there are similarities between the cabling strategies of digital and analog circuits, we need to recognize and take the differences in their cabling strategies seriously.
 

Schematic diagram (III)

Wiring has many issues to consider, but the most basic thing is to be careful.

Most harmful parasitic Components
Main parasitic components produced by printed circuit board wiring include parasitic resistance, parasitic capacitance and parasitic inductance. For example, the parasitic resistance of a PCB is formed by cabling between components. The cabling, pad, and walking wires on the PCB produce parasitic capacitance. The parasitic inductance is generated by loop inductance, mutual inductance, and passing through. When a circuit schematic is converted to an actual PCB, all these parasitic elements may interfere with the effectiveness of the circuit. This article will quantify the most tricky parasitic component type of the circuit board-parasitic capacitance, and provide an example that clearly shows the impact of Parasitic Capacitance on circuit performance.

Figure 1 deploy two adjacent cables on the PCB to easily generate parasitic capacitors. Due to the existence of this parasitic capacitor, the rapid voltage change on one line will generate a current signal on the other line.

Figure 2 consists of a 16-bit D/A converter with three 8-digit potentiometer and three amplifiers providing 65536 differential output voltages. If the VDD in the system is 5 V, the resolution or LSB size of the D/A converter is 3mV.

Figure 3 shows the first cabling attempt for the circuit shown in figure 2. This configuration produces irregular noise on the analog line, because the data input code on a specific digit goes online changes with the programming requirement of the digital potentiometer.


Harm of Parasitic Capacitance

Most parasitic capacitors are caused by two parallel cables. You can use the formula shown in figure 1 to calculate the capacitance value.

In a hybrid signal circuit, if the sensitive high-impedance analog cabling is close to the digital cabling, this capacitor may cause problems. For example, the circuit in Figure 2 is likely to have this problem.

To explain how the circuit works as shown in figure 2, a 16-bit D/A converter is formed using three 8-bit digital potentiometer and three CMOS op amps. On the left side of the figure, two digital potentiometer (U3A and u3b) are connected between the VDD and the ground, and the extract output is connected to the positive phase input of the two Op Amps (u4a and u4b. The Digital Potentiometer U2 and U3 are programmed through the SPI interface with the single-chip microcomputer (U1. In this configuration, each Digital Potentiometer is configured with an 8-bit multiplication type D/A converter. If the VDD is 5 V, the LSB size of these D/A converters is equal to 61mV.

The headers of the two digital potentiometer are connected to the positive phase inputs of the two Op Amps with buffer configurations. In this configuration, the input end of the op amp is high impedance, and the Digital Potentiometer is isolated from other parts of the circuit. These two amplifiers are configured with an output swing limit that does not exceed the input range of the second-level amplifier.

Figure 4 in this oscilloscope photo, the top waveform is taken from jp1 (to the digital code of the Digital Potentiometer), and the second waveform is taken from jp5 (adjacent analog online noise ), the bottom waveform is taken from TP10 (the noise at the output end of the 16-bit D/A converter ).


Figure 5 uses this new wiring to isolate analog and digital lines. By increasing the distance between cables, the digital noise that causes interference in the front cabling is basically eliminated.

Figure 6 shows a single code conversion result using a new 16-bit D/A converter, without causing digital noise to the digital signal programmed by the digital potentiometer.

To enable this circuit to have the performance of a 16-bit D/A converter, a third Digital Potentiometer (u2a) is used to interconnect between the output ends of two Op Amps (u4a and u4b. Programming U3A and u3b sets the voltage value after the digital potentiometer. If VDD is 5 V, you can program the output of U3A and u3b to a difference of 61mV. The voltage is adjusted by the third 8-digit potentiometer R3, And the LSB size from left to right is 3mV. The strict Device specifications required by this circuit for optimal performance are shown in table 1.

This circuit has two basic working modes. The first mode can be used to obtain programmable and adjustable DC Differential voltage. In this mode, the digital part of the circuit is used only occasionally and is not used during normal operation. The second mode is to use this circuit as an arbitrary waveform generator. In this mode, the digital part of the circuit is an essential part of the circuit operation. In this mode, capacitive coupling may occur.

Figure 2 shows the first cabling of the circuit 3. This circuit was quickly designed in the lab, with no attention to details. When wiring is checked, it is found that the digital cabling is placed next to the high-impedance analog line. It should be emphasized that the cabling should be correct for the first time. The purpose of this article is to explain how to identify problems and how to make major improvements to cabling.

Let's take a look at the different cabling in this wiring, and we can clearly see where there may be problems. The analog strip in the figure is connected from the U3A tap to the high-impedance input of the u4a amplifier. The number in the figure transmits the number code programmed for the Digital Potentiometer settings.

After measurement on the test board, it is found that the digital signal in the digital strip is coupled to the sensitive analog strip. See figure 4.

The digital signals programmed by the Digital Potentiometer in the system are gradually transmitted along the strip to the analog line of the output DC voltage. This noise is transmitted to the Third Digital Potentiometer (u5a) through the analog part of the circuit ). The Third Digital Potentiometer is flipped between two output states. The main method to solve this problem is to separate the drive-off lines. Figure 5 shows the improved Wiring Scheme.

Result 6 shows how to change the wiring. After the simulation and digital cabling are carefully separated, the circuit becomes a very clean 16-bit D/A converter. The waveform in the figure is the single-Code Conversion Result of the Third Digital Potentiometer 76. 29mV.


Conclusion

After the numbers and analog ranges are determined, careful cabling is critical to successful PCB placement. Especially when the active digital cabling is close to the high-impedance analog cabling, it will cause severe coupling noise, which can only be avoided by increasing the distance between the cabling.