Extended ROM (OPROM)

Extended ROM Base register If you need to embed an extension ROM (Oprom) in the feature card, the PCI register must be implemented. Many PCI features are embedded in the device ROM, which contains the device drivers for that feature. The start memory address and size of the extension ROM are defined in the extension ROM base register, and the extension ROM base register is in double word 12 in the configuration header area. As shown in Figure 1-1, when the system is power-up, the system must be automatically configured immediately so that each function's IO and memory decoder can identify mutually exclusive ranges of addresses. Therefore, the configuration software must be able to detect how much storage space is required for an extension ROM. In addition, in order to establish the location of its ROM in a non-conflicting address range, the system must be able to programmatically control the address decoder of the ROM.

Figure 1-1 Extension ROM Base address register when the startup configuration program detects that a feature has implemented an extended ROM base register (usually written to it full "1" and reads back), you must immediately check the first two locations of the ROM, check the signature of its extension ROM, and determine if it really installs the ROM (that is, the ROM socket may be empty). If installed, the configuration program must map (Shadow) Rom and execute its initialization code. The format of the extension ROM base register is shown in Figure 1-1:

L bit 0 is 1, which means that the ROM address decoder for this feature is enabled (assuming that the storage space bit in the command register is also set to 1).

L-bit [10:1] reserved.

L bit [31:11] is used to specify the starting address of the ROM (this address is divided according to the size of the ROM). For example, suppose the programmer writes 0xFFFFFFFE to the extension ROM base register (that is, to clear the 0-bit-extension ROM, which prevents the ROM address decoder from being enabled before allocating the starting storage place), and then reads the register, and the resulting value, if 0xfffe0000, indicates the following problem:

The value of L bit 0 is 0, which indicates that the ROM address decoder is currently disabled.

L-bit [10:1] reserved.

In the Base register field (that is, bit [31:11]), bit 17 is the least significant bit that the programmer can set to 1. The binary weight value of this bit is 128K, which means that the ROM decoder needs to allocate 128K of storage space to the ROM. The programmer then writes a 32-bit starting address to the register and assigns the ROM start address to an address boundary of size 128KB. The storage space bits in the command register take precedence over the extended ROM allow bits. The extended ROM of this feature should respond to memory access only if the memory space bit (in its command register) and the extension ROM allow bits (in its extension ROM base register) to be set to 1 o'clock at the same time.