Filtering mechanism of stm32f103xx Bxcan

first, the background of a recent project needs to use STM32F103XX to achieve can communication, and can bus message filtering on each MCU has different mechanisms, for example, SJA1000 for the identifier bit masking filtering mechanism, NXP's LPC17XX series for the identifier list query mechanism, etc.    This article is a brief introduction to the filtering mechanism of stm32f103xx. Note: The library functions provided by ST are used on the software.    Second, the body of the stm32f103xx in filtering this is really good, but also integrates the identifier bit masking filtering mechanism and the identifier list query mechanism. --->identifier bit masking filtering mechanism: This mechanism is not only to mask the corresponding bits of identifiers, but to achieve this function requires two registers,
One is the identifier register, and the other is the identifier masking register. For example, 11-bit can standard frame ID, if the identifier screen register corresponds to the"0"Bit is"0", the ID of the information received is the first"0"Bit whether it is"0"Or"1"can be passed acceptance. If the identifier screen register corresponds to the"0"Bit is"1", the ID of the information received is the first"0"Bit must be and the identifier register"0"The same position can be accepted. According to this rule, if the received information ID and the full identifier mask register is"1"is identical to the identifier register for the bit, the information is received and a receive interrupt is generated. --->identifier list query mechanism this mechanism is not only a query for matching the received identifiers, but only one register is required for this function, and the register holds the identifiers that need to be accepted. Similarly, with the 11-bit can standard frame ID as an example, a few information IDs are saved in the identifier register, and when the information is received from the can bus, the can hardware will match the information ID with the information ID in the identifier register.
If the same, is accepted, resulting in a receive interrupt, if the comparison fails, then the information is discarded, indicating that the information is not required by the CPU. According to the above introduction, we can summarize:--->If you need to accurately accept a few information, then use the identifier list query mechanism;--->If you need to accept a set of information, use the identifier bit masking mechanism. That's it. The two filtering mechanisms are far away, but stm32f103xx in non-connected products, there are 14 adjustable bit width (16-bit/32-bit) filter group,
--As to what is a bit wide, explain later--each set of filters consists of 2 32-bit wide registers (CAN_FXR0, CAN_FXR1). The Filter organization Chart is shown in the following table:

, the filter can be selected as either 32-bit-width mode or 16-bit-width mode, depending on the fscx bit, and then based on the FBMX to determine whether to use the identifier bit masking mode or the identifier list query mode. (X is the first group of filters)--->when the masking is 32 bit wide, the CAN_FXR1 register is the identifier, and the CAN_FXR2 register holds the corresponding identity masking.        Note that if you simply filter the standard frames, the CAN_FXR1 has an IDE bit of 1 (standard frame), a can_fxr2 bit of 1 (indicating that the IDE bit must be 1, or it must be a standard frame).    The standard frame identifier, as well as its standard frame shield bit, should be saved at up to 11 bits in both registers! --->when the identifier list mode is 32 bit wide, the CAN_FXR1 register holds the first set of identifiers, and the CAN_FXR2 register holds the second set of identifier bits--->when the identifier list mode is 16 bit wide, the CAN_FXR1 register low 16 bits is the first set of identifiers, the high 16 bits hold the first set of identifier screen bits, the CAN_FXR2 register low 16 bits holds the second set of identifiers, and the high 16 bits hold the second set of identifier screens. --->when the identifier list mode is 16 bit wide, the CAN_FXR1 register low 16 bits is the first set of identifiers, the high 16 bits hold the second set of identifier screen bits, the CAN_FXR2 register low 16 bits holds the third set of identifiers, and the high 16 bits hold the fourth set of identifier masks.    Note: Since the extended frame has 29 bits, all of the extended frame information needs to be filtered if you need to use 32 bit width mode. Let's do an example by setting the filter on the library function:voidCan_filterinit (can_filterinittypedef*can_filterinitstruct); The library function is the official St provided, according to the structure of the can_filterinitstruct to set can filter, the structure is as follows, typedefstruct    {        /*do not be confused by the name "uint16_t Can_filtermaskidhigh" here, * This name is very relevant when the filter is working in the identifier screen bit mode.         * But when the filter is working in the identifier list mode, this variable saves the second set of identifiers! */        //corresponds to CAN_FXR1 high 16-bituint16_t Can_filteridhigh; //corresponds to CAN_FXR1 low 16-bituint16_t Can_filteridlow; //corresponds to CAN_FXR2 high 16-bituint16_t Can_filtermaskidhigh; //corresponds to CAN_FXR2 high 16-bituint16_t Can_filtermaskidlow; //which filter group to matchuint8_t Can_filternumber; //corresponding Can_filternumber filter Mode selection (FM1R)        /*the 2 32-bit registers of the filter group (14 groups) work in the identifier screen bit mode.         * 2 32-bit registers of filter groups (14 groups) work in the identifier list mode. */uint8_t Can_filtermode; //corresponding can_filternumber filter bit width setting (can_fs1r)        /*Can_filterscale_16bit: Two x 16-bit filter * Can_filterscale_32bit: Single 32-bit filter*/uint8_t Can_filterscale; //The FIFO in which the message is filtered and stored. (CAN_FFA1R)//each FIFO can hold 3 messages.         /*Can_filter_fifo0: The filter is associated to the FIFO0 * Can_filter_fifo1: The filter is associated to the FIFO1*/uint16_t can_filterfifoassignment; //whether to enable the corresponding Can_filternumber filterfunctionalstate can_filteractivation;    } can_filterinittypedef; Now to actually configure a 32-bit identifier masking bit mode, filter identifier 0x123/0x121(the lowest bit can be"0"For"1". Others are prescribed) for example:voidSet_filter (void) {        //declares the filter structure bodyCan_filterinittypedef can_filterinitstructure; //Using Filters 0Can_filterinitstructure.can_filternumber =0; //identifier screen bit modeCan_filterinitstructure.can_filtermode=Can_filtermode_idmask; //using 32bit filterscan_filterinitstructure.can_filterscale=Can_filterscale_32bit; //Filter identifier 0x123//Note that the standard frame is placed in the highest 11-bitCan_filterinitstructure.can_filteridhigh= (0x123<<5); Can_filterinitstructure.can_filteridlow=0x0000; //Filter Mask identifiers up to 10 bits are all "1", the 11th bit is "0", that is, do not make provisions. Can_filterinitstructure.can_filtermaskidhigh=0xff8a; Can_filterinitstructure.can_filtermaskidlow=0x0000; //The filter FIFO0 points to filter 0, which is filtered to the qualified data, and interrupts should be read from the FIFO0. Can_filterinitstructure.can_filterfifoassignment=0; /*NOTE here!!! , the filter must be enabled, whether you need to use a filter or not!         Otherwise, the data cannot be received.         * If you do not want to use the filter, you can set all the shielding bit to "0", that is, all do not detect, but must be enabled!!! */        //Enable Filtercan_filterinitstructure.can_filteractivation=ENABLE; //Call Library FunctionsCan_filterinit (&can_filterinitstructure);    Third, reference in this article in the study of the stm32f103xx can filter mechanism in the process, found on the internet a blogger wrote very detailed and meticulous, but also more easy to understand, interested can be a reference, but also very grateful to the blogger's sharing. Reference Link: http://blog.csdn.net/flydream0/article/details/52317532Record time: September 8, 2016 record location: Shenzhen wz

Filtering mechanism of stm32f103xx Bxcan