ARM Processor Mode
There are 7 modes of operation for ARM processors:
- L user mode (USER,USR): Normal program execution mode
- L Fast Interrupt Mode (FIQ,FIQ): For high-speed data transfer and channel processing
- L external Interrupt mode (IRQ,IRQ): for normal interrupt handling
- L Privileged Mode (SUPERVISOR,SVE): A protected mode for use by the operating system
- L Data Access Abort mode (ABORT,ABT): for virtual storage and storage protection
- L Undefined instruction Abort mode (undefined,und): coprocessor to support software emulation hardware
- L system Mode (System,sys): Operating system tasks for running privileged levels
- 6 Processor modes other than user mode are called privileged mode (privileged Modes). In these modes, the program can access all of the system resources , or you can switch the processor mode arbitrarily . In addition to system mode, 5 other privileged modes are known as exception modes.
- The processor mode can be switched by software control or by an external interrupt or exception handling process . Most of the user programs run in user mode. At this point, the application cannot access some system resources protected by the operating system. The application is also not able to switch directly to processor mode. When processor mode switching is required, the application can generate exception handling and switch processor mode during exception handling. This architecture allows the operating system to control the resources of the entire system.
- When an unexpected interrupt occurs on the application, the processor makes the appropriate exception mode. In each exception mode, there is a set of registers for the corresponding exception handlers to use, so that when entering the exception mode, the user mode of the register (save the program running state) is not destroyed.
- system mode is not entered through the exception process, it has exactly the same register as the user mode . However, the system mode is privileged mode, can access all system resources, and can be switched directly to the processor mode. It is primarily intended for use by operating system tasks. Typically, the operating system's tasks require access to all system resources, while the task still uses the user-mode register group instead of using the appropriate register group in the exception mode, which guarantees that the task State will not be destroyed when an abnormal interrupt occurs.
- ARM processors are available in 7 different processor modes, with a set of corresponding register groups in each of the processor modes . At any time (that is, any processor mode), the visible registers include 15 universal registers (R0~R14), one or two status registers (two, CPSR and SPSR in abnormal mode) and program counters (PC). In all registers, some are the same physical registers that are shared by each mode, and some registers are independent physical registers owned by each mode. in exception mode, the maximum number of registers that can be used is 18 (15+2+1).
Registers in various processor modes:
Each anomaly mode has corresponding independent R13, R14, and SPSR.
ARM Processor Mode
